[coreboot-gerrit] Change in coreboot[master]: soc/amd/common/gpio_banks: Drop underscore in __gpio

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48635 )

Change subject: soc/amd/common/gpio_banks: Drop underscore in __gpio
......................................................................

soc/amd/common/gpio_banks: Drop underscore in __gpio

The local function names were chosen such that they don't
collide with <gpio.h> so the prefix is unnecessary.

Change-Id: I4799a6d6b87e8081324d88b0773e61cbda0d4cfb
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48635
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Felix Held 
---
M src/soc/amd/common/block/gpio_banks/gpio.c
1 file changed, 16 insertions(+), 16 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c
index a5f0eaf..8e340a3 100644
--- a/src/soc/amd/common/block/gpio_banks/gpio.c
+++ b/src/soc/amd/common/block/gpio_banks/gpio.c
@@ -94,7 +94,7 @@
    return (uintptr_t)gpio_ctrl_ptr(gpio_num);
 }

-static void __gpio_update32(gpio_t gpio_num, uint32_t mask, uint32_t or)
+static void gpio_update32(gpio_t gpio_num, uint32_t mask, uint32_t or)
 {
    uint32_t reg;

@@ -105,31 +105,31 @@
 }

/* Set specified bits of a register to match those of ctrl. */
-static void __gpio_setbits32(gpio_t gpio_num, uint32_t mask, uint32_t ctrl)
+static void gpio_setbits32(gpio_t gpio_num, uint32_t mask, uint32_t ctrl)
 {
-	__gpio_update32(gpio_num, ~mask, ctrl & mask);
+	gpio_update32(gpio_num, ~mask, ctrl & mask);
 }

-static void __gpio_and32(gpio_t gpio_num, uint32_t mask)
+static void gpio_and32(gpio_t gpio_num, uint32_t mask)
 {
-	__gpio_update32(gpio_num, mask, 0);
+	gpio_update32(gpio_num, mask, 0);
 }

-static void __gpio_or32(gpio_t gpio_num, uint32_t or)
+static void gpio_or32(gpio_t gpio_num, uint32_t or)
 {
-	__gpio_update32(gpio_num, -1UL, or);
+	gpio_update32(gpio_num, -1UL, or);
 }

static void master_switch_clr(uint32_t mask)
 {
    const uint8_t master_reg = GPIO_MASTER_SWITCH / sizeof(uint32_t);
-	__gpio_and32(master_reg, ~mask);
+	gpio_and32(master_reg, ~mask);
 }

static void master_switch_set(uint32_t or)
 {
    const uint8_t master_reg = GPIO_MASTER_SWITCH / sizeof(uint32_t);
-	__gpio_or32(master_reg, or);
+	gpio_or32(master_reg, or);
 }

int gpio_get(gpio_t gpio_num)
@@ -142,27 +142,27 @@

void gpio_set(gpio_t gpio_num, int value)
 {
-	__gpio_setbits32(gpio_num, GPIO_OUTPUT_VALUE, value ? GPIO_OUTPUT_VALUE : 0);
+	gpio_setbits32(gpio_num, GPIO_OUTPUT_VALUE, value ? GPIO_OUTPUT_VALUE : 0);
 }

void gpio_input_pulldown(gpio_t gpio_num)
 {
-	__gpio_setbits32(gpio_num, GPIO_PULL_MASK, GPIO_PULLDOWN_ENABLE);
+	gpio_setbits32(gpio_num, GPIO_PULL_MASK, GPIO_PULLDOWN_ENABLE);
 }

void gpio_input_pullup(gpio_t gpio_num)
 {
-	__gpio_setbits32(gpio_num, GPIO_PULL_MASK, GPIO_PULLUP_ENABLE);
+	gpio_setbits32(gpio_num, GPIO_PULL_MASK, GPIO_PULLUP_ENABLE);
 }

void gpio_input(gpio_t gpio_num)
 {
-	__gpio_and32(gpio_num, ~GPIO_OUTPUT_ENABLE);
+	gpio_and32(gpio_num, ~GPIO_OUTPUT_ENABLE);
 }

void gpio_output(gpio_t gpio_num, int value)
 {
-	__gpio_or32(gpio_num, GPIO_OUTPUT_ENABLE);
+	gpio_or32(gpio_num, GPIO_OUTPUT_ENABLE);
    gpio_set(gpio_num, value);
 }

@@ -217,9 +217,9 @@

soc_gpio_hook(gpio, mux);

-		__gpio_setbits32(gpio, PAD_CFG_MASK, control);
+		gpio_setbits32(gpio, PAD_CFG_MASK, control);
    	/* Clear interrupt and wake status (write 1-to-clear bits) */
-		__gpio_or32(gpio, GPIO_INT_STATUS | GPIO_WAKE_STATUS);
+		gpio_or32(gpio, GPIO_INT_STATUS | GPIO_WAKE_STATUS);
    	if (control_flags == 0)
    		continue;