[coreboot-gerrit] Change in coreboot[master]: soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration

[Karthik Ramasubramanian (Code Review)]

Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42453 )

Change subject: soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration
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soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration

Add SkipCpuReplacementCheck config to control the FSPM UPD used
for skipping the CPU replacementment check to avoid the forced
MRC training for the platforms with soldered down SOC.

BUG=b:160201335
TEST=Build and verify CSE Lite SKU on Waddleddo.
Cq-Depend: chrome-internal:3142530

Change-Id: I63fcdab3686322406cf7c24fc26cbb535cc58c8d
Signed-off-by: V Sowmya 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42453
Tested-by: build bot (Jenkins) 
Reviewed-by: Karthik Ramasubramanian 
Reviewed-by: Sridhar Siricilla 
Reviewed-by: Rizwan Qureshi 
---
M src/soc/intel/jasperlake/chip.h
M src/soc/intel/jasperlake/romstage/fsp_params.c
2 files changed, 10 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Rizwan Qureshi: Looks good to me, approved
  Karthik Ramasubramanian: Looks good to me, approved
  Sridhar Siricilla: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h
index d8ea560..e5e10e3 100644
--- a/src/soc/intel/jasperlake/chip.h
+++ b/src/soc/intel/jasperlake/chip.h
@@ -284,6 +284,13 @@
     */
    uint8_t cpu_ratio_override;

+	/* Skip CPU replacement check
+	 * 0: disable
+	 * 1: enable
+	 * Setting this option to skip CPU replacement check to avoid the forced MRC training
+	 * for the platforms with soldered down SOC.
+	 */
+	uint8_t SkipCpuReplacementCheck;
 };

typedef struct soc_intel_jasperlake_config config_t;
diff --git a/src/soc/intel/jasperlake/romstage/fsp_params.c b/src/soc/intel/jasperlake/romstage/fsp_params.c
index 6d4055a..0688eea 100644
--- a/src/soc/intel/jasperlake/romstage/fsp_params.c
+++ b/src/soc/intel/jasperlake/romstage/fsp_params.c
@@ -114,6 +114,9 @@
    		ARRAY_SIZE(config->PchHdaAudioLinkSndwEnable), "copy buffer overflow!");
    memcpy(m_cfg->PchHdaAudioLinkSndwEnable, config->PchHdaAudioLinkSndwEnable,
    	sizeof(config->PchHdaAudioLinkSndwEnable));
+
+	/* Skip the CPU replacement check */
+	m_cfg->SkipCpuReplacementCheck = config->SkipCpuReplacementCheck;
 }

void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)