Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48280 )
Change subject: soc/intel/jasperlake: Enables CSE Lite driver for JSL platform in the romstage
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Patch Set 5:
(2 comments)
https://review.coreboot.org/c/coreboot/+/48280/2/src/soc/intel/jasperlake/ro...
File src/soc/intel/jasperlake/romstage/romstage.c:
https://review.coreboot.org/c/coreboot/+/48280/2/src/soc/intel/jasperlake/ro...
PS2, Line 138: if (!s3wake)
I think it is safe to do the call to cse_fw_sync() before save_dimm_info() and also restrict the cal […]
Ack
https://review.coreboot.org/c/coreboot/+/48280/2/src/soc/intel/jasperlake/ro...
PS2, Line 142: cse_fw_sync();
I wonder if we should add dram_init_done_hooks just like we have cbmem_init_hooks. […]
Agree, I will explore the suggested method..
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I43030e77f6ede53c23e6c9e65d34db85c141e13a
Gerrit-Change-Number: 48280
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