[coreboot-gerrit] Change in coreboot[master]: mb/google/brya/var/brask: Set PL and PsysPL

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: David Wu, Hou-hsun Lee, Paul Menzel, Alan Huang.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59576 )

Change subject: mb/google/brya/var/brask: Set PL and PsysPL
......................................................................

Patch Set 4: Code-Review+1

(1 comment)

File src/mainboard/google/brya/variants/brask/ramstage.c:

https://review.coreboot.org/c/coreboot/+/59576/comment/e5526dd7_c750dc0c 
PS3, Line 13: { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, 15000, 15000,  55000,  55000, 123000 },
            : 	{ PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, 15000, 15000,  55000,  55000, 123000 },
            : 	{ PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, 28000, 28000,  64000,  64000,  90000 },
            : 	{ PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, 28000, 28000,  64000,  64000, 140000 },
            : 	{ PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, 45000, 45000, 115000, 115000, 215000 },
            : 	{ PCI_DEVICE_ID_INTEL_ADL_P_ID_1, 45, 45000, 45000,  95000,  95000, 125000 },
> It's better to sort it in the same way with code here https://review.coreboot. […]

this matches others already in the tree too, see https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/src...