Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin.
Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/83928?usp=email )
Change subject: soc/mediatek/mt8196: Fix timer reset in BL31 ......................................................................
Patch Set 8:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83928/comment/17931e5f_db96b338?usp... : PS8, Line 9: 1. Set systimer compensation to version 2.0. : 2. The system does not need to serve pending IRQ from systimer : after rebooting. Therefore we clear systimer IRQ pending bit : at early booting. Can we have 2 separate patches for these? Item 1 looks like a fix to me, but item 2 seems like an improvement only. Is my understanding correct?
File src/soc/mediatek/mt8196/include/soc/timer.h:
https://review.coreboot.org/c/coreboot/+/83928/comment/27318493_fe41c2c0?usp... : PS8, Line 22: /* 0x0*/ Remove these comments, as there are already `check_member` below.
File src/soc/mediatek/mt8196/timer_prepare.c:
https://review.coreboot.org/c/coreboot/+/83928/comment/7e08c131_23739c67?usp... : PS8, Line 18: &mtk_systimer->cnttval[id].con Use a local variable for this pointer.
https://review.coreboot.org/c/coreboot/+/83928/comment/674b258f_92ffd23e?usp... : PS8, Line 28: clrbits32 `clrbits32p`