HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31310
Change subject: sb/intel/i82801gx/lpc: Use macros instead of magic numbers ......................................................................
sb/intel/i82801gx/lpc: Use macros instead of magic numbers
Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/intel/i82801gx/lpc.c 1 file changed, 12 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/31310/1
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 7497c79..25e5ec7 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -259,12 +259,12 @@ outw(config->alt_gp_smi_en, pmbase + ALT_GP_SMI_EN);
/* Set up power management block and determine sleep mode */ - reg32 = inl(pmbase + 0x04); // PM1_CNT + reg32 = inl(pmbase + PM1_CNT);
reg32 &= ~(7 << 10); // SLP_TYP - reg32 |= (1 << 1); // enable C3->C0 transition on bus master - reg32 |= (1 << 0); // SCI_EN - outl(reg32, pmbase + 0x04); + reg32 |= BM_RLD; // enable C3->C0 transition on bus master + reg32 |= SCI_EN; + outl(reg32, pmbase + PM1_CNT); }
static void i82801gx_configure_cstates(struct device *dev) @@ -489,11 +489,11 @@
fadt->pm1a_evt_blk = pmbase; fadt->pm1b_evt_blk = 0x0; - fadt->pm1a_cnt_blk = pmbase + 0x4; + fadt->pm1a_cnt_blk = pmbase + PM1_CNT; fadt->pm1b_cnt_blk = 0x0; - fadt->pm2_cnt_blk = pmbase + 0x20; - fadt->pm_tmr_blk = pmbase + 0x8; - fadt->gpe0_blk = pmbase + 0x28; + fadt->pm2_cnt_blk = pmbase + PM2_CNT; + fadt->pm_tmr_blk = pmbase + PM1_TMR; + fadt->gpe0_blk = pmbase + GPE0_STS; fadt->gpe1_blk = 0;
fadt->pm1_evt_len = 4; @@ -531,7 +531,7 @@ fadt->x_pm1a_cnt_blk.bit_width = 16; fadt->x_pm1a_cnt_blk.bit_offset = 0; fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; - fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4; + fadt->x_pm1a_cnt_blk.addrl = pmbase + PM1_CNT; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 0; @@ -545,21 +545,21 @@ fadt->x_pm2_cnt_blk.bit_width = 8; fadt->x_pm2_cnt_blk.bit_offset = 0; fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20; + fadt->x_pm2_cnt_blk.addrl = pmbase + PM2_CNT; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; - fadt->x_pm_tmr_blk.addrl = pmbase + 0x8; + fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = 64; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; - fadt->x_gpe0_blk.addrl = pmbase + 0x28; + fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 0;