[coreboot-gerrit] [M] Change in coreboot[main]: soc/intel/xeon_sp: Reserve MMIO high range

[Shuo Liu (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Tim Chu.

Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/83538?usp=email )

Change subject: soc/intel/xeon_sp: Reserve MMIO high range
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Patch Set 4:

(2 comments)

Patchset:

PS2:
> I was referring to the bigger picture. FSP assigns resources, that's the […]

Emm, I need some time to do some thinking around your inputs. Nico, may I have an example of coreboot allocated domain resource window? BTW, should we merge this change in parallel while continuing the discussion?

Commit Message:

https://review.coreboot.org/c/coreboot/+/83538/comment/ca3d7a48_9a7903eb?usp... :
PS1, Line 7: soc/intel/xeon_sp: Reserve FSP MMIO high window
> > For 'non PCI domain MMIOs', they are used for misc devices belonged to an IIO stack but not belong […]

They are known to coreboot, either in forms of named MMIO ranges (e.g. VT-d BAR), or reserved MMIO ranges (visible but not usable).