Attention is currently required from: Ren Kuo. Hello Ren Kuo,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/59839
to review the following change.
Change subject: mb/google/guybrush/dewatt: initial dewatt device config ......................................................................
mb/google/guybrush/dewatt: initial dewatt device config
add Synaptics S9831 touch pad for dewatt add Elan 6918 touch screen for dewatt add Realtek 5682 , ALC1019 for dewatt
BUG=b:208182457,b:208373433,b:208172493 TEST=emerge-guybrush coreboot chromeos-bootimage
Change-Id: I01eb3b7c194dffd417b81386903d5bd437cd9b3e Signed-off-by: Ren Kuo ren.kuo@quanta.corp-partner.google.com --- M src/mainboard/google/guybrush/variants/dewatt/Makefile.inc A src/mainboard/google/guybrush/variants/dewatt/gpio.c M src/mainboard/google/guybrush/variants/dewatt/overridetree.cb 3 files changed, 132 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/59839/1
diff --git a/src/mainboard/google/guybrush/variants/dewatt/Makefile.inc b/src/mainboard/google/guybrush/variants/dewatt/Makefile.inc index 88e75bd..dcdc83b 100644 --- a/src/mainboard/google/guybrush/variants/dewatt/Makefile.inc +++ b/src/mainboard/google/guybrush/variants/dewatt/Makefile.inc @@ -1,3 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-or-later
+bootblock-y += gpio.c +romstage-y += gpio.c +ramstage-y += gpio.c +verstage-y += gpio.c + subdirs-y += ./memory + +smm-y += gpio.c diff --git a/src/mainboard/google/guybrush/variants/dewatt/gpio.c b/src/mainboard/google/guybrush/variants/dewatt/gpio.c new file mode 100644 index 0000000..f4f3e8b --- /dev/null +++ b/src/mainboard/google/guybrush/variants/dewatt/gpio.c @@ -0,0 +1,64 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <boardid.h> +#include <gpio.h> +#include <soc/gpio.h> +#include <baseboard/variants.h> + +/* This table is used by dewatt variant with board version < 2. */ +static const struct soc_amd_gpio bid1_override_gpio_table[] = { + /* EN_SPKR */ + PAD_GPO(GPIO_70, HIGH), +}; + +/* This table is used by dewatt variant with board version >= 2. */ +static const struct soc_amd_gpio bid2_override_gpio_table[] = { + /* EN_SPKR */ + PAD_GPO(GPIO_70, HIGH), + +}; + +static const struct soc_amd_gpio override_early_gpio_table[] = { +}; + +/* This table is used by dewatt variant with board version < 2. */ +static const struct soc_amd_gpio bid1_override_pcie_gpio_table[] = { +}; + +/* This table is used by dewatt variant with board version >= 2. */ +static const struct soc_amd_gpio bid2_override_pcie_gpio_table[] = { +}; + +const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) +{ + uint32_t board_version = board_id(); + + if (board_version < 2) { + *size = ARRAY_SIZE(bid1_override_gpio_table); + return bid1_override_gpio_table; + } + + *size = ARRAY_SIZE(bid2_override_gpio_table); + return bid2_override_gpio_table; +} + +const struct soc_amd_gpio *variant_early_override_gpio_table(size_t *size) +{ + *size = ARRAY_SIZE(override_early_gpio_table); + return override_early_gpio_table; +} + +const struct soc_amd_gpio *variant_pcie_override_gpio_table(size_t *size) +{ + uint32_t board_version = board_id(); + + if (board_version < 2) { + *size = ARRAY_SIZE(bid1_override_pcie_gpio_table); + return bid1_override_pcie_gpio_table; + } + + *size = ARRAY_SIZE(bid2_override_pcie_gpio_table); + return bid2_override_pcie_gpio_table; +} diff --git a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb index 5a0ad98..84faa62 100644 --- a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb @@ -1,4 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-or-later +fw_config + field KB_BL 0 + option KB_BL_ABSENT 0 + option KB_BL_PRESENT 1 + end +end
chip soc/amd/cezanne device domain 0 on @@ -53,5 +59,60 @@ register "probed" = "1" device i2c 15 on end end + chip drivers/i2c/hid + register "generic.hid" = ""PNP0C50"" + register "generic.desc" = ""Synaptics Touchpad"" + register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_9)" + register "generic.wake" = "GEVENT_22" + register "generic.probed" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 2c on end + end end # I2C0 + device ref i2c_1 on + chip drivers/i2c/hid + register "generic.hid" = ""ELAN6918"" + register "generic.desc" = ""ELAN Touchscreen"" + register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_89)" + register "generic.probed" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_121)" + register "generic.reset_delay_ms" = "20" + register "generic.reset_off_delay_ms" = "2" + register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_120)" + register "generic.stop_delay_ms" = "280" + register "generic.stop_off_delay_ms" = "2" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_68)" + register "generic.enable_delay_ms" = "1" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 10 on end + end + end # I2C1 + device ref i2c_2 on + chip drivers/i2c/generic + register "hid" = ""10EC5682"" + register "name" = ""RT58"" + register "desc" = ""Realtek RT5682"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_90)" + register "property_count" = "1" + register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" + register "property_list[0].name" = ""realtek,jd-src"" + register "property_list[0].integer" = "1" + device i2c 1a on end + end + chip drivers/i2c/generic + register "hid" = ""10EC1019"" + register "desc" = ""Realtek SPK AMP L"" + register "uid" = "0" + register "probed" = "1" + device i2c 2a on end + end + chip drivers/i2c/generic + register "hid" = ""10EC1019"" + register "desc" = ""Realtek SPK AMP R"" + register "uid" = "1" + device i2c 29 on end + end + end # I2C2 end # chip soc/amd/cezanne