[coreboot-gerrit] [M] Change in coreboot[master]: soc|vc/amd/phoenix: Prepare for PSP verstage

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Jon Murphy, Karthik Ramasubramanian, Matt DeVillier, Raul Rangel, Tim Van Patten.

Hello Felix Held, Fred Reitberger, Jason Glenesk, Jon Murphy, Matt DeVillier, Raul Rangel, Tim Van Patten, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/75584?usp=email

to look at the new patch set (#3).

Change subject: soc|vc/amd/phoenix: Prepare for PSP verstage
......................................................................

soc|vc/amd/phoenix: Prepare for PSP verstage

Update all the required sources to lay the ground work to enable PSP
verstage.

BUG=b:284984667
TEST=Build Myst BIOS image with PSP verstage enabled.

Change-Id: I6fbb1f835ac2ad6ff47f843321e1bd380af7ce33
Signed-off-by: Karthikeyan Ramasubramanian 
---
M src/soc/amd/phoenix/include/soc/psp_verstage_addr.h
M src/soc/amd/phoenix/psp_verstage/Makefile.inc
M src/soc/amd/phoenix/psp_verstage/chipset.c
M src/soc/amd/phoenix/psp_verstage/svc.c
M src/soc/amd/phoenix/psp_verstage/svc.h
M src/vendorcode/amd/fsp/phoenix/include/bl_uapp/bl_syscall_public.h
6 files changed, 117 insertions(+), 23 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/75584/3