[coreboot-gerrit] Change in coreboot[master]: mb/google/brya: Reset XHCI controller while preparing for S5

[Subrata Banik (Code Review)]

Attention is currently required from: Maulik V Vaghela, Paul Menzel, Sridhar Siricilla, Nick Vaccaro, Eric Lai, Felix Held.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63552 )

Change subject: mb/google/brya: Reset XHCI controller while preparing for S5
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Patch Set 5:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/63552/comment/a3866457_f26347be 
PS4, Line 12: the PMC IPC timeout issue
> Ah, I didn’t check, but also I shouldn’t have to. […]

Ack

https://review.coreboot.org/c/coreboot/+/63552/comment/4223cfa0_bebaf122 
PS4, Line 37: SMI handler
> Sorry, thinking error on my part. coreboot of course does not run anymore during shutdown (besides the installed handlers).
>
> But, why can’t this be worked around/fixed in the OS driver?

fixing in FW is comparatively easier 😊 and could apply MB specific W/As as well.
> I thought, we try to avoid SMM?

Anyway we have this SMI handler where the control is expected to reach with `shutdown` hence, we are just adding one operation to reset the XHCI controller using the same handler. Avoiding SMM is a wish for sure, but currently we are using it as is, is my point.

I hope you are good with it for now?

File src/mainboard/google/brya/smihandler.c:

https://review.coreboot.org/c/coreboot/+/63552/comment/31cd21df_f4e8cfc3 
PS4, Line 15: 	/* USB sleep preparations */
> Something like:
> > Work around bug in PMC controller with S5

this is not PMC controller problem, rather XHCI controller is unable to reflect its state proper upon poweron from S5, hence, added the correct statement