[coreboot-gerrit] Change in coreboot[master]: nb/i945: Rewrite peg_bits for MCHBAR16(UPMC1)

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40370 )

Change subject: nb/i945: Rewrite peg_bits for MCHBAR16(UPMC1)
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nb/i945: Rewrite peg_bits for MCHBAR16(UPMC1)

Change-Id: I3c9e848077cdd13158dbfd19326b95b42fc1c1fb
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/i945/raminit.c
1 file changed, 5 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/40370/1

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 4353a9c..bb886d4 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -2171,18 +2171,14 @@
    MCHBAR32(C1DRC1) = reg32;

if (CONFIG(NORTHBRIDGE_INTEL_SUBTYPE_I945GM)) {
-		if (i945_silicon_revision() > 1) {
-			/* FIXME bits 5 and 0 only if PCIe graphics is disabled */
-			u16 peg_bits = (1 << 5) | (1 << 0);
-
+		/* FIXME bits 5 and 0 only if PCIe graphics is disabled */
+		u16 peg_bits = MCHBAR16(UPMC1);
+		peg_bits &= ((1 << 5) | (1 << 0));
+		if (i945_silicon_revision() > 1)
    		MCHBAR16(UPMC1) = 0x1010 | peg_bits;
-		} else {
-			/* FIXME bits 5 and 0 only if PCIe graphics is disabled */
-			u16 peg_bits = (1 << 5) | (1 << 0);
-
+		else
    		/* Rev 0 and 1 */
    		MCHBAR16(UPMC1) = 0x0010 | peg_bits;
-		}
    }

reg16 = MCHBAR16(UPMC2);