John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43657 )
Change subject: soc/intel/tigerlake: Disable VT-d and no DMAR table for pre-QS platform ......................................................................
Patch Set 3:
(5 comments)
https://review.coreboot.org/c/coreboot/+/43657/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43657/2//COMMIT_MSG@9 PS2, Line 9: pre-QS silicon
Please mention ES platform somewhere. Maybe: […]
Done
https://review.coreboot.org/c/coreboot/+/43657/2//COMMIT_MSG@9 PS2, Line 9: Enabling VT-d on pre-QS silicon may have issues like rendering the : Thunderbolt driver useless.
Please reference the datasheet/errata, where this is documented.
The errata was discussed in b:158519322 and is disclosed under NDA, so we would prefer not adding it here.
https://review.coreboot.org/c/coreboot/+/43657/2//COMMIT_MSG@14 PS2, Line 14: ES(cpu:0x806c0)
Please add a space before the (.
Done
https://review.coreboot.org/c/coreboot/+/43657/2//COMMIT_MSG@15 PS2, Line 15: QS(cpu:0x806c1)
Please add a space before the (.
Done
https://review.coreboot.org/c/coreboot/+/43657/2/src/soc/intel/tigerlake/rom... File src/soc/intel/tigerlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/43657/2/src/soc/intel/tigerlake/rom... PS2, Line 188: Vt-D
VT-d
Done