[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Add restore and enable GPIO PM

[Aamir Bohra (Code Review)]

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41712 )

Change subject: soc/intel/common: Add restore and enable GPIO PM
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Patch Set 1:
> Patch Set 1:
>
> oh no issue in chip.c, gpio_soc_defs already shift the number. We only need to figure out ASL part.

The issue is in devicetree PM config fill instead of disabling gpio PM for 0, 1, 2, 4, 5, it is disabling for 0, 1, 2, 3, 4, and asl does not restore it for COMM3.