24 Mar
2020
24 Mar
'20
11:45 p.m.
Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39797 )
Change subject: vendorcode/intel/fsp: Update FSP header for Tiger Lake ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39797/2/src/vendorcode/intel/fsp/fs... File src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h:
https://review.coreboot.org/c/coreboot/+/39797/2/src/vendorcode/intel/fsp/fs... PS2, Line 896: 315
This one is generated automatically. I have explain things in Bug. […]
if you want i can split this Cl and make size correct first and then rebase this one on top of that CL
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic743cb2134e6273a63c1212506c81ccbbdec442a
Gerrit-Change-Number: 39797
Gerrit-PatchSet: 2
Gerrit-Owner: Ronak Kanabar ronak.kanabar@intel.com
Gerrit-Reviewer: Aamir Bohra aamir.bohra@intel.com
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