[coreboot-gerrit] Change in coreboot[master]: mb/google/dedede/var/galith: Update DPTF parameters

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/49480 )

Change subject: mb/google/dedede/var/galith: Update DPTF parameters
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mb/google/dedede/var/galith: Update DPTF parameters

Update the first version DPTF parameters received from the thermal team.

BUG=b:177628854
TEST=cros build-ap --debug -b dedede --fw-name galtic

Signed-off-by: FrankChu 
Change-Id: Ia8e76d303db0add95e77693f15cad108fa92303b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49480
Tested-by: build bot (Jenkins) 
Reviewed-by: Sumeet R Pawnikar 
Reviewed-by: Karthik Ramasubramanian 
---
M src/mainboard/google/dedede/variants/galtic/overridetree.cb
1 file changed, 46 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Sumeet R Pawnikar: Looks good to me, but someone else must approve
  Karthik Ramasubramanian: Looks good to me, approved

diff --git a/src/mainboard/google/dedede/variants/galtic/overridetree.cb b/src/mainboard/google/dedede/variants/galtic/overridetree.cb
index 9ed1dd0..28c82f5 100644
--- a/src/mainboard/google/dedede/variants/galtic/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/galtic/overridetree.cb
@@ -57,7 +57,53 @@
    # USB Port Configuration
    register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"     # Camera

+	register "tcc_offset" = "8"     # TCC of 97C
+
    device domain 0 on
+		device pci 04.0 on
+			# Default DPTF Policy for all Dedede boards if not overridden
+			chip drivers/intel/dptf
+				## Passive Policy
+				register "policies.passive" = "{
+					[0] = DPTF_PASSIVE(CPU, CPU,           67, 1000),
+					[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 62, 1000),
+					[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 58, 1000),
+					[3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 40, 1000)
+				}"
+
+				## Critical Policy
+				register "policies.critical" = "{
+					[0] = DPTF_CRITICAL(CPU,           105, SHUTDOWN),
+					[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 98, SHUTDOWN),
+					[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN),
+					[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 80, SHUTDOWN)
+				}"
+
+				## Power Limits Control
+				register "controls.power_limits" = "{
+					.pl1 = {
+						.min_power = 4500,
+						.max_power = 7000,
+						.time_window_min = 1 * MSECS_PER_SEC,
+						.time_window_max = 1 * MSECS_PER_SEC,
+						.granularity = 200,
+					},
+					.pl2 = {
+						.min_power = 20000,
+						.max_power = 20000,
+						.time_window_min = 1 * MSECS_PER_SEC,
+						.time_window_max = 1 * MSECS_PER_SEC,
+						.granularity = 1000,
+					}
+				}"
+
+				register "options.tsr[0].desc" = ""Charger""
+				register "options.tsr[1].desc" = ""Vcore""
+				register "options.tsr[2].desc" = ""Ambient""
+
+				device generic 0 on end
+			end
+		end # SA Thermal device
    	device pci 14.0 on
    		chip drivers/usb/acpi
    			device usb 0.0 on