Hello Karthikeyan Ramasubramanian,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/31999
to review the following change.
Change subject: soc/intel/common: Move support to log XHCI wake events ......................................................................
soc/intel/common: Move support to log XHCI wake events
The policy to identify and log the XHCI wake events is similar between skylake and apollolake. Hence move the similar parts to a common location.
BUG=b:123429132 BRANCH=None TEST=Ensure that the system boots to ChromeOS. Ensure that the wake up events due to USB are logged into the event logs. 12 | 2019-03-20 13:36:12 | S0ix Enter 13 | 2019-03-20 13:36:23 | S0ix Exit 14 | 2019-03-20 13:36:23 | Wake Source | PME - XHCI (USB 2.0 port) | 9 15 | 2019-03-20 13:36:23 | Wake Source | GPE # | 13 16 | 2019-03-20 13:36:54 | S0ix Enter 17 | 2019-03-20 13:36:59 | S0ix Exit 18 | 2019-03-20 13:36:59 | Wake Source | PME - XHCI (USB 2.0 port) | 9 19 | 2019-03-20 13:36:59 | Wake Source | GPE # | 13 20 | 2019-03-20 13:38:15 | S0ix Enter 21 | 2019-03-20 13:38:23 | S0ix Exit 22 | 2019-03-20 13:38:23 | Wake Source | PME - XHCI (USB 2.0 port) | 9 23 | 2019-03-20 13:38:23 | Wake Source | GPE # | 13
Change-Id: Ia6643342e3292984e422ff3c3fcd4bc0d99f947e Signed-off-by: Karthikeyan Ramasubramanian kramasub@google.com --- M src/soc/intel/common/Kconfig M src/soc/intel/common/Makefile.inc A src/soc/intel/common/elog_xhci.c A src/soc/intel/common/elog_xhci.h M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/elog.c 6 files changed, 216 insertions(+), 137 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/31999/1
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig index b5caf40..7344198 100644 --- a/src/soc/intel/common/Kconfig +++ b/src/soc/intel/common/Kconfig @@ -68,4 +68,11 @@ acpi_get_gpe() is used to provide interrupt status to TPM layer. This option specifies the GPE number.
+config SOC_INTEL_COMMON_ELOG_XHCI + bool + default n + help + Set this option to identify if XHCI caused a wake up and log that + information into the event log. + endif # SOC_INTEL_COMMON diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc index 22d350c..54d98bb 100644 --- a/src/soc/intel/common/Makefile.inc +++ b/src/soc/intel/common/Makefile.inc @@ -20,6 +20,7 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c ramstage-y += vbt.c ramstage-$(CONFIG_SOC_INTEL_COMMON_NHLT) += nhlt.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_ELOG_XHCI) += elog_xhci.c
bootblock-$(CONFIG_TPM_CR50) += tpm_tis.c verstage-$(CONFIG_TPM_CR50) += tpm_tis.c @@ -27,6 +28,8 @@ ramstage-$(CONFIG_TPM_CR50) += tpm_tis.c postcar-$(CONFIG_TPM_CR50) += tpm_tis.c
+smm-$(CONFIG_SOC_INTEL_COMMON_ELOG_XHCI) += elog_xhci.c + ifeq ($(CONFIG_MMA),y) MMA_BLOBS_PATH = $(call strip_quotes,$(CONFIG_MMA_BLOBS_PATH)) MMA_TEST_NAMES = $(notdir $(wildcard $(MMA_BLOBS_PATH)/tests/*)) diff --git a/src/soc/intel/common/elog_xhci.c b/src/soc/intel/common/elog_xhci.c new file mode 100644 index 0000000..6984e46 --- /dev/null +++ b/src/soc/intel/common/elog_xhci.c @@ -0,0 +1,160 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <device/mmio.h> +#include <device/pci_ops.h> +#include <elog.h> +#include <soc/intel/common/elog_xhci.h> +#include <soc/pci_devs.h> +#include <stdint.h> + +/* Wake on disconnect enable */ +#define XHCI_STATUS_WDE (1 << 26) +/* Wake on connect enable */ +#define XHCI_STATUS_WCE (1 << 25) +/* Port link status change */ +#define XHCI_STATUS_PLC (1 << 22) +/* Connect status change */ +#define XHCI_STATUS_CSC (1 << 17) +/* Port link status */ +#define XHCI_STATUS_PLS_SHIFT (5) +#define XHCI_STATUS_PLS_MASK (0xF << XHCI_STATUS_PLS_SHIFT) +#define XHCI_STATUS_PLS_RESUME (15 << XHCI_STATUS_PLS_SHIFT) + +static bool pch_xhci_csc_set(uint32_t port_status) +{ + return !!(port_status & XHCI_STATUS_CSC); +} + +static bool pch_xhci_wake_capable(uint32_t port_status) +{ + return !!((port_status & XHCI_STATUS_WCE) | + (port_status & XHCI_STATUS_WDE)); +} + +static bool pch_xhci_plc_set(uint32_t port_status) +{ + return !!(port_status & XHCI_STATUS_PLC); +} + +static bool pch_xhci_resume(uint32_t port_status) +{ + return (port_status & XHCI_STATUS_PLS_MASK) == XHCI_STATUS_PLS_RESUME; +} + +/* + * Check if a particular USB port caused wake by: + * 1. Change in connect/disconnect status (if enabled) + * 2. USB device activity + * + * Params: + * base : MMIO address of first port. + * num : Number of ports. + * event : Event that needs to be added in case wake source is found. + * + * Return value: + * true : Wake source was found. + * false : Wake source was not found. + */ +static bool pch_xhci_port_wake_check(uintptr_t base, uint8_t num, + uint32_t event) +{ + uint8_t i; + uint32_t port_status; + bool found = false; + + for (i = 0; i < num; i++, base += 0x10) { + /* Read port status and control register for the port. */ + port_status = read32((void *)base); + + /* Ensure that the status is not all 1s. */ + if (port_status == 0xffffffff) + continue; + + /* + * Check if CSC bit is set and port is capable of wake on + * connect/disconnect to identify if the port caused wake + * event for usb attach/detach. + */ + if (pch_xhci_csc_set(port_status) && + pch_xhci_wake_capable(port_status)) { + elog_add_event_wake(event, i + 1); + found = true; + continue; + } + + /* + * Check if PLC is set and PLS indicates resume to identify if + * the port caused wake event for usb activity. + */ + if (pch_xhci_plc_set(port_status) && + pch_xhci_resume(port_status)) { + elog_add_event_wake(event, i + 1); + found = true; + } + } + return found; +} + +/* + * Update elog event and instance depending upon the USB2 port that caused + * the wake event. + * + * Return value: + * true = Indicates that USB2 wake event was found. + * false = Indicates that USB2 wake event was not found. + */ +static inline bool pch_xhci_usb2_update_wake_event(uintptr_t mmio_base, + struct xhci_usb_info *info) +{ + return pch_xhci_port_wake_check(mmio_base + info->usb2_port_status_reg, + info->num_usb2_ports, + ELOG_WAKE_SOURCE_PME_XHCI_USB_2); +} + +/* + * Update elog event and instance depending upon the USB3 port that caused + * the wake event. + * + * Return value: + * true = Indicates that USB3 wake event was found. + * false = Indicates that USB3 wake event was not found. + */ +static inline bool pch_xhci_usb3_update_wake_event(uintptr_t mmio_base, + struct xhci_usb_info *info) +{ + return pch_xhci_port_wake_check(mmio_base + info->usb3_port_status_reg, + info->num_usb3_ports, + ELOG_WAKE_SOURCE_PME_XHCI_USB_3); +} + +#ifdef __SIMPLE_DEVICE__ +bool pch_xhci_update_wake_event(pci_devfn_t dev, struct xhci_usb_info *info) +#else +bool pch_xhci_update_wake_event(struct device *dev, struct xhci_usb_info *info) +#endif +{ + uintptr_t mmio_base; + bool event_found = false; + mmio_base = ALIGN_DOWN(pci_read_config32(dev, PCI_BASE_ADDRESS_0), 16); + + if (pch_xhci_usb2_update_wake_event(mmio_base, info)) + event_found = true; + + if (pch_xhci_usb3_update_wake_event(mmio_base, info)) + event_found = true; + + return event_found; +} diff --git a/src/soc/intel/common/elog_xhci.h b/src/soc/intel/common/elog_xhci.h new file mode 100644 index 0000000..9e38911 --- /dev/null +++ b/src/soc/intel/common/elog_xhci.h @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOC_INTEL_COMMON_ELOG_XHCI_H +#define SOC_INTEL_COMMON_ELOG_XHCI_H + +#include <stdint.h> +#include <device/pci_type.h> + +struct xhci_usb_info { + uint32_t usb2_port_status_reg; + uint32_t num_usb2_ports; + uint32_t usb3_port_status_reg; + uint32_t num_usb3_ports; +}; + +#ifdef __SIMPLE_DEVICE__ +bool pch_xhci_update_wake_event(pci_devfn_t dev, struct xhci_usb_info *info); +#else +bool pch_xhci_update_wake_event(struct device *dev, struct xhci_usb_info *info); +#endif + +#endif /* SOC_INTEL_COMMON_ELOG_XHCI_H */ diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 53094b1..c02900a 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -66,6 +66,7 @@ select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP select SOC_INTEL_COMMON_BLOCK_UART + select SOC_INTEL_COMMON_ELOG_XHCI select SOC_INTEL_COMMON_PCH_BASE select SOC_INTEL_COMMON_NHLT select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c index 7a8932b..3094591 100644 --- a/src/soc/intel/skylake/elog.c +++ b/src/soc/intel/skylake/elog.c @@ -22,6 +22,7 @@ #include <stdint.h> #include <elog.h> #include <intelblocks/pmclib.h> +#include <soc/intel/common/elog_xhci.h> #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/smbus.h> @@ -42,142 +43,13 @@ #define XHCI_USB3_PORT_STATUS_REG 0x540 #define XHCI_USB2_PORT_NUM 10 #define XHCI_USB3_PORT_NUM 6 -/* Wake on disconnect enable */ -#define XHCI_STATUS_WDE (1 << 26) -/* Wake on connect enable */ -#define XHCI_STATUS_WCE (1 << 25) -/* Port link status change */ -#define XHCI_STATUS_PLC (1 << 22) -/* Connect status change */ -#define XHCI_STATUS_CSC (1 << 17) -/* Port link status */ -#define XHCI_STATUS_PLS_SHIFT (5) -#define XHCI_STATUS_PLS_MASK (0xF << XHCI_STATUS_PLS_SHIFT) -#define XHCI_STATUS_PLS_RESUME (15 << XHCI_STATUS_PLS_SHIFT)
-static bool pch_xhci_csc_set(uint32_t port_status) -{ - return !!(port_status & XHCI_STATUS_CSC); -} - -static bool pch_xhci_wake_capable(uint32_t port_status) -{ - return !!((port_status & XHCI_STATUS_WCE) | - (port_status & XHCI_STATUS_WDE)); -} - -static bool pch_xhci_plc_set(uint32_t port_status) -{ - return !!(port_status & XHCI_STATUS_PLC); -} - -static bool pch_xhci_resume(uint32_t port_status) -{ - return (port_status & XHCI_STATUS_PLS_MASK) == XHCI_STATUS_PLS_RESUME; -} - -/* - * Check if a particular USB port caused wake by: - * 1. Change in connect/disconnect status (if enabled) - * 2. USB device activity - * - * Params: - * base : MMIO address of first port. - * num : Number of ports. - * event : Event that needs to be added in case wake source is found. - * - * Return value: - * true : Wake source was found. - * false : Wake source was not found. - */ -static bool pch_xhci_port_wake_check(uintptr_t base, uint8_t num, - uint32_t event) -{ - uint8_t i; - uint32_t port_status; - bool found = false; - - for (i = 0; i < num; i++, base += 0x10) { - /* Read port status and control register for the port. */ - port_status = read32((void *)base); - - /* Ensure that the status is not all 1s. */ - if (port_status == 0xffffffff) - continue; - - /* - * Check if CSC bit is set and port is capable of wake on - * connect/disconnect to identify if the port caused wake - * event for usb attach/detach. - */ - if (pch_xhci_csc_set(port_status) && - pch_xhci_wake_capable(port_status)) { - elog_add_event_wake(event, i + 1); - found = true; - continue; - } - - /* - * Check if PLC is set and PLS indicates resume to identify if - * the port caused wake event for usb activity. - */ - if (pch_xhci_plc_set(port_status) && - pch_xhci_resume(port_status)) { - elog_add_event_wake(event, i + 1); - found = true; - } - } - return found; -} - -/* - * Update elog event and instance depending upon the USB2 port that caused - * the wake event. - * - * Return value: - * true = Indicates that USB2 wake event was found. - * false = Indicates that USB2 wake event was not found. - */ -static inline bool pch_xhci_usb2_update_wake_event(uintptr_t mmio_base) -{ - return pch_xhci_port_wake_check(mmio_base + XHCI_USB2_PORT_STATUS_REG, - XHCI_USB2_PORT_NUM, - ELOG_WAKE_SOURCE_PME_XHCI_USB_2); -} - -/* - * Update elog event and instance depending upon the USB3 port that caused - * the wake event. - * - * Return value: - * true = Indicates that USB3 wake event was found. - * false = Indicates that USB3 wake event was not found. - */ -static inline bool pch_xhci_usb3_update_wake_event(uintptr_t mmio_base) -{ - return pch_xhci_port_wake_check(mmio_base + XHCI_USB3_PORT_STATUS_REG, - XHCI_USB3_PORT_NUM, - ELOG_WAKE_SOURCE_PME_XHCI_USB_3); -} - -#ifdef __SIMPLE_DEVICE__ -static bool pch_xhci_update_wake_event(pci_devfn_t dev) -#else -static bool pch_xhci_update_wake_event(struct device *dev) -#endif -{ - uintptr_t mmio_base; - bool event_found = false; - mmio_base = ALIGN_DOWN(pci_read_config32(dev, PCI_BASE_ADDRESS_0), 16); - - if (pch_xhci_usb2_update_wake_event(mmio_base)) - event_found = true; - - if (pch_xhci_usb3_update_wake_event(mmio_base)) - event_found = true; - - return event_found; -} +static struct xhci_usb_info usb_info = { + .usb2_port_status_reg = XHCI_USB2_PORT_STATUS_REG, + .num_usb2_ports = XHCI_USB2_PORT_NUM, + .usb3_port_status_reg = XHCI_USB3_PORT_STATUS_REG, + .num_usb3_ports = XHCI_USB3_PORT_NUM, +};
struct pme_status_info { #ifdef __SIMPLE_DEVICE__ @@ -203,7 +75,8 @@ * If wake source is XHCI, check for detailed wake source events on * USB2/3 ports. */ - if ((info->dev == PCH_DEV_XHCI) && pch_xhci_update_wake_event(dev)) + if ((info->dev == PCH_DEV_XHCI) && + pch_xhci_update_wake_event(dev, &usb_info)) return;
elog_add_event_wake(info->elog_event, 0); @@ -251,7 +124,7 @@ * PME_STS_BIT in controller register. */ if (!dev_found) - dev_found = pch_xhci_update_wake_event(PCH_DEV_XHCI); + dev_found = pch_xhci_update_wake_event(PCH_DEV_XHCI, &usb_info);
if (!dev_found) elog_add_event_wake(ELOG_WAKE_SOURCE_PME_INTERNAL, 0);