Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32089
Change subject: soc/intel/cannonlake: Update CPU Ratio base on MSR ......................................................................
soc/intel/cannonlake: Update CPU Ratio base on MSR
The following is logic with FSP, as long as the Cpu Ratio input in coreboot is different with CpuStrapSet, system will force to follow input from coreboot. But CpuStrapsetting is floating, it will 0 from first cold boot before memory training and set to 0x1c after first memory training.
BUG=b:129412691 TEST=Boot up sarien platform and force recovery, check there's no reset in the path of recovery.
Signed-off-by: Lijian Zhao lijian.zhao@intel.com Change-Id: I959188be46343bc6f2cb3cc149097b4d449802aa --- M src/soc/intel/cannonlake/romstage/fsp_params.c 1 file changed, 6 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/32089/1
diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index 3e3aa5e..b7dbac7 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -15,10 +15,12 @@
#include <assert.h> #include <chip.h> +#include <cpu/x86/msr.h> #include <console/console.h> #include <fsp/util.h> #include <intelblocks/pmclib.h> #include <soc/iomap.h> +#include <soc/msr.h> #include <soc/pci_devs.h> #include <soc/romstage.h> #include <vendorcode/google/chromeos/chromeos.h> @@ -69,19 +71,10 @@ m_cfg->SkipMpInit = !CONFIG_USE_INTEL_FSP_MP_INIT; #endif
- /* Disable CPU Flex Ratio and SaGv in recovery mode */ - if (vboot_recovery_mode_enabled()) { - struct chipset_power_state *ps = pmc_get_power_state(); - - /* - * Only disable when coming from S5 (cold reset) otherwise - * the flex ratio may be locked and FSP will return an error. - */ - if (ps && ps->prev_sleep_state == ACPI_S5) { - m_cfg->CpuRatio = 0; - m_cfg->SaGv = 0; - } - } + /* Set CpuRatio to be match with MSR settings */ + msr_t flex_ratio; + flex_ratio = rdmsr(MSR_FLEX_RATIO); + m_cfg->CpuRatio = (flex_ratio.lo >> 8) & 0xff;
/* If ISH is enabled, enable ISH elements */ if (!dev)