[coreboot-gerrit] Change in coreboot[master]: intel/sandybridge: Make timC training more robust.

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/22776 )

Change subject: intel/sandybridge: Make timC training more robust.
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Patch Set 2:

I'll test it on my platform.
Do you know why it has training errors ? Did you change one of the other timings until no more training erros occur ? Could try to change reg_c14_offset to see if it fixes the problem ?