Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph, Boris Mittelberg. Hello build bot (Jenkins), Furquan Shaikh, Subrata Banik, Aamir Bohra, Patrick Rudolph, EricR Lai, Boris Mittelberg,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/50599
to look at the new patch set (#5).
Change subject: soc/intel/alderlake: Fix PCI IRQ tables ......................................................................
soc/intel/alderlake: Fix PCI IRQ tables
Both the IO-APIC and PIC mode PCI IRQ tables are incorrect for ADL; the 2nd field in each package is supposed to be pin, not function number, and some of the IRQ #s differ from what the FSP programs, therefore align the ACPI table to match what the FSP is currently programming.
BUG=b:180105941 TEST=boot brya, no more `GSI INT` or `failed to derive IRQ routing` errors seen in dmesg
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: I182be69e8d9ebd854ed74dbb69f4d1f1a539cf2f --- M src/soc/intel/alderlake/acpi/pci_irqs.asl M src/soc/intel/alderlake/include/soc/irq.h 2 files changed, 42 insertions(+), 48 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/50599/5