Attention is currently required from: Arthur Heymans, Christian Walter, David Hendricks, Jonathan Zhang, Nico Huber, Nill Ge, Patrick Rudolph, Paul Menzel, TangYiwei, niehaitao@bytedance.com.
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75722?usp=email )
Change subject: mb/bytedance: Add 2 SPR sockets server board bd_egs ......................................................................
Patch Set 6:
(14 comments)
File src/mainboard/bytedance/Kconfig:
https://review.coreboot.org/c/coreboot/+/75722/comment/2fd33317_bcd1024b : PS6, Line 15: config MAINBOARD_FAMILY : default "Family" This is supposed to be configured in the mainboard Kconfig
File src/mainboard/bytedance/bd_egs/Kconfig:
https://review.coreboot.org/c/coreboot/+/75722/comment/37cdd1d4_c7c76f99 : PS6, Line 17: string no need to redefine types, remove
https://review.coreboot.org/c/coreboot/+/75722/comment/e0bd56e9_134eb8ff : PS6, Line 21: string remove
https://review.coreboot.org/c/coreboot/+/75722/comment/69191f4d_85734b61 : PS6, Line 25: string remove
https://review.coreboot.org/c/coreboot/+/75722/comment/c68b5a25_11ecb759 : PS6, Line 29: int remove
https://review.coreboot.org/c/coreboot/+/75722/comment/d5a2ace3_fd79a9d4 : PS6, Line 33: string remove
File src/mainboard/bytedance/bd_egs/bootblock.c:
https://review.coreboot.org/c/coreboot/+/75722/comment/8ef8d968_2fecee33 : PS6, Line 1: /* SPDX-License-Identifier: GPL-2.0-only */ Some of the files are licensed with GPL-2.0-or-later. Would you mind using it on the others as well?
File src/mainboard/bytedance/bd_egs/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/75722/comment/2ecf8e2b_d59f27bf : PS6, Line 4: # configure MSR_TURBO_RATIO_LIMIT, MSR_TURBO_RATIO_LIMIT_CORES msrs Seems superfluous, please remove
File src/mainboard/bytedance/bd_egs/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/75722/comment/eda406a4_a4ae12c8 : PS6, Line 14: // platform ACPI tables Seems superfluous, please remove
https://review.coreboot.org/c/coreboot/+/75722/comment/f9b436b4_0600d002 : PS6, Line 17: // global NVS and variables same
https://review.coreboot.org/c/coreboot/+/75722/comment/2a1831d8_1b866dee : PS6, Line 22: // SPR-SP ACPI tables same
https://review.coreboot.org/c/coreboot/+/75722/comment/c96cdc9e_829c6f4a : PS6, Line 25: // LPC related entries same
File src/mainboard/bytedance/bd_egs/gpio.h:
https://review.coreboot.org/c/coreboot/+/75722/comment/5761a6a7_1cc6c74c : PS6, Line 4: Missing header guards
File src/mainboard/bytedance/bd_egs/ramstage.c:
https://review.coreboot.org/c/coreboot/+/75722/comment/acffbcb8_7b41e65b : PS6, Line 8: void mainboard_silicon_init_params(FSPS_UPD *params) : { : } remove