Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/22769
Change subject: soc/intel/skylake: Remove set_subsystem() from SoC ......................................................................
soc/intel/skylake: Remove set_subsystem() from SoC
Intel common PCI driver is handle PCI subsystem ID programming, hence no need to have an explicit soc function to do the same.
TEST=PCI subsystem id is getting programming during pci enumeration.
Change-Id: Iead57a286b26d532e578cfff99f412c23fd4c2fe Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip_fsp20.c 2 files changed, 0 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/22769/1
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 3e33053..fa51607 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -802,18 +802,3 @@ original->SendVrMbxCmd, params->SendVrMbxCmd); } - -static void pci_set_subsystem(device_t dev, unsigned int vendor, - unsigned int device) -{ - if (!vendor || !device) - pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, - pci_read_config32(dev, PCI_VENDOR_ID)); - else - pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, - (device << 16) | vendor); -} - -struct pci_operations soc_pci_ops = { - .set_subsystem = &pci_set_subsystem -}; diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 8e5cc2a..f4060b2 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -293,10 +293,6 @@ soc_irq_settings(params); }
-struct pci_operations soc_pci_ops = { - .set_subsystem = &pci_dev_set_subsystem -}; - /* Mainboard GPIO Configuration */ __attribute__((weak)) void mainboard_silicon_init_params(FSP_S_CONFIG *params) {