Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59287 )
Change subject: util/inteltool: Add ICH10D PCI ID ......................................................................
util/inteltool: Add ICH10D PCI ID
Add the PCI device ID for the ICH10D southbridge. While we're at it, also fix up whitespace in inteltool.h of an adjacent definition.
Change-Id: I98d88a9ce27d3ddaafd7123ee51b2111a8bef019 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M util/inteltool/gpio.c M util/inteltool/inteltool.c M util/inteltool/inteltool.h M util/inteltool/powermgt.c M util/inteltool/rootcmplx.c M util/inteltool/spi.c 6 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/59287/1
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c index 53164e1c..5808204 100644 --- a/util/inteltool/gpio.c +++ b/util/inteltool/gpio.c @@ -943,6 +943,7 @@ defaults_size = ARRAY_SIZE(pp_pch_mobile_defaults); break; case PCI_DEVICE_ID_INTEL_ICH10: + case PCI_DEVICE_ID_INTEL_ICH10D: case PCI_DEVICE_ID_INTEL_ICH10DO: case PCI_DEVICE_ID_INTEL_ICH10R: gpiobase = pci_read_word(sb, 0x48) & 0xfffc; diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index 0a8431a..14f6851 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -149,6 +149,7 @@ /* Southbridges (LPC controllers) */ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "371AB/EB/MB" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10, "ICH10" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10D, "ICH10D" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10DO, "ICH10DO" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10R, "ICH10R" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DH, "ICH9DH" }, diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index 40b739f..97091c5 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -76,7 +76,8 @@ #define PCI_DEVICE_ID_INTEL_ICH9ME 0x2917 #define PCI_DEVICE_ID_INTEL_ICH10DO 0x3a14 #define PCI_DEVICE_ID_INTEL_ICH10R 0x3a16 -#define PCI_DEVICE_ID_INTEL_ICH10 0x3a18 +#define PCI_DEVICE_ID_INTEL_ICH10 0x3a18 +#define PCI_DEVICE_ID_INTEL_ICH10D 0x3a1a #define PCI_DEVICE_ID_INTEL_3400_DESKTOP 0x3b00 #define PCI_DEVICE_ID_INTEL_3400_MOBILE 0x3b01 #define PCI_DEVICE_ID_INTEL_P55 0x3b02 diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c index f4ebc5a..9e98809 100644 --- a/util/inteltool/powermgt.c +++ b/util/inteltool/powermgt.c @@ -780,6 +780,7 @@ pm_registers_size = ARRAY_SIZE(lynxpoint_lp_pm_registers); break; case PCI_DEVICE_ID_INTEL_ICH10: + case PCI_DEVICE_ID_INTEL_ICH10D: case PCI_DEVICE_ID_INTEL_ICH10DO: case PCI_DEVICE_ID_INTEL_ICH10R: pmbase = pci_read_word(sb, 0x40) & 0xff80; diff --git a/util/inteltool/rootcmplx.c b/util/inteltool/rootcmplx.c index da9144a..bdafa1e 100644 --- a/util/inteltool/rootcmplx.c +++ b/util/inteltool/rootcmplx.c @@ -29,6 +29,7 @@ case PCI_DEVICE_ID_INTEL_ICH9M: case PCI_DEVICE_ID_INTEL_ICH9ME: case PCI_DEVICE_ID_INTEL_ICH10: + case PCI_DEVICE_ID_INTEL_ICH10D: case PCI_DEVICE_ID_INTEL_ICH10DO: case PCI_DEVICE_ID_INTEL_ICH10R: case PCI_DEVICE_ID_INTEL_NM10: diff --git a/util/inteltool/spi.c b/util/inteltool/spi.c index ad16cb8..1bb5ba2 100644 --- a/util/inteltool/spi.c +++ b/util/inteltool/spi.c @@ -107,6 +107,7 @@ case PCI_DEVICE_ID_INTEL_ICH9M: case PCI_DEVICE_ID_INTEL_ICH9ME: case PCI_DEVICE_ID_INTEL_ICH10: + case PCI_DEVICE_ID_INTEL_ICH10D: case PCI_DEVICE_ID_INTEL_ICH10DO: case PCI_DEVICE_ID_INTEL_ICH10R: case PCI_DEVICE_ID_INTEL_NM10: @@ -259,6 +260,7 @@ case PCI_DEVICE_ID_INTEL_ICH9M: case PCI_DEVICE_ID_INTEL_ICH9ME: case PCI_DEVICE_ID_INTEL_ICH10: + case PCI_DEVICE_ID_INTEL_ICH10D: case PCI_DEVICE_ID_INTEL_ICH10DO: case PCI_DEVICE_ID_INTEL_ICH10R: case PCI_DEVICE_ID_INTEL_NM10: