Attention is currently required from: Raul Rangel.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68913 )
Change subject: cpu/x86: Set up cpu_info storage using MSR ......................................................................
Patch Set 7:
(1 comment)
File src/arch/x86/include/arch/cpu.h:
https://review.coreboot.org/c/coreboot/+/68913/comment/12406a2a_80bba07d PS5, Line 159: msr_t msr = rdmsr(IA32_GS_BASE); : ci = (struct cpu_info *)(uintptr_t)msr.raw; : return ci;
Oh, I didn't notice you changed the semantics. x86_32 %gs points to `segment_data`, while x86_64 points to `cpu_infos`. Can you leave the semantics how they were so it's not confusing? I think if you leave %gs pointing to `segment_data` you can leave this function unchanged since the `mov %gs:0` should correctly work.
Oh nice catch. I fixed the sematics so that setting the GDT segment has the same semantics as setting the MSR.