Attention is currently required from: Patrick Rudolph. Alexander Couzens has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51332 )
Change subject: soc/intel/skylake: detect if IGD is present ......................................................................
soc/intel/skylake: detect if IGD is present
When enabling IGD on a CPU which doesn't have an IGD, the FSP-S will hang indefinitive.
Signed-off-by: Alexander Couzens lynxis@fe80.eu Change-Id: Ife6e6157db0df772b48a9cb95a0f1494ae21c250 --- M src/soc/intel/skylake/bootblock/report_platform.c M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/romstage/fsp_params.c M src/soc/intel/skylake/romstage/systemagent.c M src/soc/intel/skylake/systemagent.c 5 files changed, 22 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/51332/1
diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index 99b5ba1..d83de73 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -224,6 +224,11 @@ uint16_t igdid = get_dev_id(dev); const char *igd_type = "Unknown";
+ if (pci_read_config16(dev, PCI_VENDOR_ID) != 0x8086) { + printk(BIOS_DEBUG, "IGD: device is not present\n"); + return; + } + for (i = 0; i < ARRAY_SIZE(igd_table); i++) { if (igd_table[i].igdid == igdid) { igd_type = igd_table[i].name; diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 0ae98a9..4b35b8b 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -7,6 +7,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci_ids.h> +#include <device/pci_ops.h> #include <fsp/util.h> #include <gpio.h> #include <intelblocks/cfg.h> @@ -532,7 +533,8 @@ }
dev = pcidev_path_on_root(SA_DEVFN_IGD); - if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled) + if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled && \ + pci_read_config16(dev, PCI_VENDOR_ID) == 0x8086) params->PeiGraphicsPeimInit = 1; else params->PeiGraphicsPeimInit = 0; diff --git a/src/soc/intel/skylake/romstage/fsp_params.c b/src/soc/intel/skylake/romstage/fsp_params.c index 2793c2d..86f5af9 100644 --- a/src/soc/intel/skylake/romstage/fsp_params.c +++ b/src/soc/intel/skylake/romstage/fsp_params.c @@ -5,6 +5,7 @@ #include <cpu/x86/msr.h> #include <fsp/util.h> #include <intelblocks/cpulib.h> +#include <device/pci_ops.h> #include <soc/iomap.h> #include <soc/msr.h> #include <soc/pci_devs.h> @@ -110,9 +111,16 @@ const struct soc_intel_skylake_config *config) { const struct device *dev; + bool igd = false;
dev = pcidev_path_on_root(SA_DEVFN_IGD); - m_cfg->InternalGfx = dev && dev->enabled; + if (dev && dev->enabled) { + igd = 0x8086 == pci_read_config16(SA_DEVFN_IGD, PCI_VENDOR_ID); + if (!igd) + printk(BIOS_INFO, "IGD is enabled but not present.\n"); + } + + m_cfg->InternalGfx = igd;
/* * If iGPU is enabled, set IGD stolen size to 64MB. The FBC diff --git a/src/soc/intel/skylake/romstage/systemagent.c b/src/soc/intel/skylake/romstage/systemagent.c index f22fd53..8535e97 100644 --- a/src/soc/intel/skylake/romstage/systemagent.c +++ b/src/soc/intel/skylake/romstage/systemagent.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <console/console.h> #include <device/device.h> #include <device/pci_ops.h> #include <intelblocks/systemagent.h> @@ -28,8 +29,9 @@ pci_write_config16(PCH_DEV_P2SB, PCH_P2SB_HBDF, V_DEFAULT_HBDF); pci_write_config16(PCH_DEV_P2SB, PCH_P2SB_IBDF, V_DEFAULT_IBDF);
- if (igd_dev && igd_dev->enabled) + if (igd_dev && igd_dev->enabled && pci_read_config16(SA_DEVFN_IGD, PCI_VENDOR_ID) == 0x8086) { sa_set_mch_bar(&soc_gfxvt_mmio_descriptor, 1); + }
sa_set_mch_bar(&soc_vtvc0_mmio_descriptor, 1); } diff --git a/src/soc/intel/skylake/systemagent.c b/src/soc/intel/skylake/systemagent.c index 785a5e6..e2b1443 100644 --- a/src/soc/intel/skylake/systemagent.c +++ b/src/soc/intel/skylake/systemagent.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <console/console.h> #include <cpu/x86/msr.h> #include <delay.h> #include <device/device.h> @@ -45,7 +46,7 @@ ARRAY_SIZE(soc_fixed_resources));
if (!config->ignore_vtd && soc_is_vtd_capable()) { - if (igd_dev && igd_dev->enabled) + if (igd_dev && igd_dev->enabled && pci_read_config16(igd_dev, PCI_VENDOR_ID) == 0x8086) sa_add_fixed_mmio_resources(dev, index, &soc_gfxvt_mmio_descriptor, 1);