Attention is currently required from: Bora Guvendik, Selma Bensaid, Tim Wawrzynczak, Rizwan Qureshi, Krishna P Bhat D, Patrick Rudolph.
Usha P has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61162 )
Change subject: soc/intel/common: Re-use Alder Lake-M device IDs for Alder Lake-N
......................................................................
Patch Set 3:
(1 comment)
File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/61162/comment/49b3e39b_0725f97e
PS3, Line 3400: #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP1 0x54b8
: #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP2 0x54b9
: #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP3 0x54ba
: #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP4 0x54bb
: #define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP5 0x54bc
: #define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP6 0x54bd
: #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP7 0x54be
: #define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP8 0x54bf
: #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP9 0x54b0
: #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP10 0x54b1
Hm, for ADL-N, though, wouldn't these be called […]
No. According to EDS Doc #645548, ADL-N has root port's 1,2,3,4,7,9,10,11 and 12.
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