[coreboot-gerrit] Change in coreboot[master]: soc/intel/broadwell: Align raminit-related code with Haswell

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46364 )

Change subject: soc/intel/broadwell: Align raminit-related code with Haswell
......................................................................

soc/intel/broadwell: Align raminit-related code with Haswell

Use Haswell MCHBAR register names and align cosmetics of functions.

Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical.

Change-Id: Ie8f369a704b833da86c2eb5864dffe2e8c4bb466
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46364
Reviewed-by: Arthur Heymans 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/broadwell/include/soc/systemagent.h
M src/soc/intel/broadwell/romstage/raminit.c
2 files changed, 22 insertions(+), 12 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/soc/intel/broadwell/include/soc/systemagent.h b/src/soc/intel/broadwell/include/soc/systemagent.h
index 3b56e9d..920b710 100644
--- a/src/soc/intel/broadwell/include/soc/systemagent.h
+++ b/src/soc/intel/broadwell/include/soc/systemagent.h
@@ -87,7 +87,10 @@
 #define MCHBAR16(x)	*((volatile u16 *)(MCH_BASE_ADDRESS + (x)))
 #define MCHBAR32(x)	*((volatile u32 *)(MCH_BASE_ADDRESS + (x)))

-#define MCHBAR_PEI_VERSION	0x5034
+#define MAD_CHNL		0x5000
+#define MAD_DIMM(ch)		(0x5004 + 4 * (ch))
+
+#define MRC_REVISION		0x5034

#define GFXVTBAR		0x5400
 #define EDRAMBAR		0x5408
@@ -127,6 +130,8 @@

#define BIOS_RESET_CPL		0x5da8

+#define MC_BIOS_DATA		0x5e04
+
 /* System Agent identification */
 u8 systemagent_revision(void);

diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c
index fb780cf..00419fc 100644
--- a/src/soc/intel/broadwell/romstage/raminit.c
+++ b/src/soc/intel/broadwell/romstage/raminit.c
@@ -27,33 +27,38 @@
  */
 static void report_memory_config(void)
 {
-	u32 addr_decoder_common, addr_decode_ch[2];
+	u32 addr_decode_ch[2];
    int i;

-	addr_decoder_common = MCHBAR32(0x5000);
-	addr_decode_ch[0] = MCHBAR32(0x5004);
-	addr_decode_ch[1] = MCHBAR32(0x5008);
+	const u32 addr_decoder_common = MCHBAR32(MAD_CHNL);
+	addr_decode_ch[0] = MCHBAR32(MAD_DIMM(0));
+	addr_decode_ch[1] = MCHBAR32(MAD_DIMM(1));

printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n",
-	       (MCHBAR32(0x5e04) * 13333 * 2 + 50)/100);
+	       (MCHBAR32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100);
+
    printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n",
-	       addr_decoder_common & 3,
+	       (addr_decoder_common >> 0) & 3,
           (addr_decoder_common >> 2) & 3,
           (addr_decoder_common >> 4) & 3);

for (i = 0; i < ARRAY_SIZE(addr_decode_ch); i++) {
    	u32 ch_conf = addr_decode_ch[i];
-		printk(BIOS_DEBUG, "memcfg channel[%d] config (%8.8x):\n",
-		       i, ch_conf);
+
+		printk(BIOS_DEBUG, "memcfg channel[%d] config (%8.8x):\n", i, ch_conf);
+
    	printk(BIOS_DEBUG, "   enhanced interleave mode %s\n",
    	       ((ch_conf >> 22) & 1) ? "on" : "off");
+
    	printk(BIOS_DEBUG, "   rank interleave %s\n",
    	       ((ch_conf >> 21) & 1) ? "on" : "off");
+
    	printk(BIOS_DEBUG, "   DIMMA %d MB width %s %s rank%s\n",
    	       ((ch_conf >> 0) & 0xff) * 256,
    	       ((ch_conf >> 19) & 1) ? "x16" : "x8 or x32",
    	       ((ch_conf >> 17) & 1) ? "dual" : "single",
    	       ((ch_conf >> 16) & 1) ? "" : ", selected");
+
    	printk(BIOS_DEBUG, "   DIMMB %d MB width %s %s rank%s\n",
    	       ((ch_conf >> 8) & 0xff) * 256,
    	       ((ch_conf >> 19) & 1) ? "x16" : "x8 or x32",
@@ -128,10 +133,10 @@
    	die("pei_data version mismatch\n");

/* Print the MRC version after executing the UEFI PEI stage. */
-	u32 version = MCHBAR32(MCHBAR_PEI_VERSION);
+	u32 version = MCHBAR32(MRC_REVISION);
    printk(BIOS_DEBUG, "MRC Version %d.%d.%d Build %d\n",
-		version >> 24, (version >> 16) & 0xff,
-		(version >> 8) & 0xff, version & 0xff);
+		(version >> 24) & 0xff, (version >> 16) & 0xff,
+		(version >>  8) & 0xff, (version >>  0) & 0xff);

report_memory_config();