[coreboot-gerrit] [XS] Change in coreboot[main]: soc/mediatek/common: Reduce eMMC clock frequency to 400kHz

[Yidi Lin (Code Review)]

Attention is currently required from: Hung-Te Lin, Kiwi Liu, Mengqi Zhang, Paul Menzel, Yu-Ping Wu.

Yidi Lin has posted comments on this change by Kiwi Liu. ( https://review.coreboot.org/c/coreboot/+/84298?usp=email )

Change subject: soc/mediatek/common: Reduce eMMC clock frequency to 400kHz
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Patch Set 14:

(7 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/84298/comment/15705d62_525ec0ad?usp... :
PS14, Line 7: Reduce eMMC clock frequency to 400kHz
Correct src clk frq to 400 MHz for eMMMC clk of 400 kHz

https://review.coreboot.org/c/coreboot/+/84298/comment/b94600ed_64a40765?usp... :
PS14, Line 10: power-on.
power-on due to wrong src_hz value.

https://review.coreboot.org/c/coreboot/+/84298/comment/a08d7116_3e278368?usp... :
PS14, Line 11: When we need to set a clock output frequency, we actually set a
leave one blank line above.

https://review.coreboot.org/c/coreboot/+/84298/comment/21175769_63c5fd24?usp... :
PS14, Line 13: he frequency
             : division value to 125
and get the division value 125.

https://review.coreboot.org/c/coreboot/+/84298/comment/7a3c8c8e_618f6ae4?usp... :
PS14, Line 16: So we correct source clock frequency to 400MHz for eMMC output clock of 400KHz.
leave one blank line above.

https://review.coreboot.org/c/coreboot/+/84298/comment/df3f8776_8cf2b6d2?usp... :
PS14, Line 16:  400KHz.
move to next line.

File src/soc/mediatek/common/msdc.c:

https://review.coreboot.org/c/coreboot/+/84298/comment/a8e1b96a_62f137ff?usp... :
PS9, Line 432: 	host->src_hz = 400 * 1000 * 1000;
> @[e-mail]  […]

According to depthcharge, MT8173's source clock is 200MHz. But we don't enable `mtk_emmc_early_init` on it. It should be fine to keep 400Mhz here.