Attention is currently required from: Roger Lu, Yu-Ping Wu, Yuchen Huang. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46878 )
Change subject: soc/mediatek/mt8192: add clkbuf and srclken_rc MT6359P driver ......................................................................
Patch Set 60:
(6 comments)
Patchset:
PS60: final nits, probably no code changes.
File src/soc/mediatek/mt8192/Kconfig:
https://review.coreboot.org/c/coreboot/+/46878/comment/9cfbcef7_7bf59026 PS60, Line 89: srclken_rc can you also add what does that stand for? for example
srclken_rc (sxxxr clock enable re...? )
I can't tell what does srclken_rc mean.
File src/soc/mediatek/mt8192/clkbuf.c:
https://review.coreboot.org/c/coreboot/+/46878/comment/f940d510_635dd067 PS60, Line 98: /* 1.0 XO_WCN/XO_RF switch from VS1 to LDO VRFCK_1 */ : /* unlock pmic key */ do we still have some 1.0 switching from vs1 to ldo vrfck_1, or the new 1.0 is just unlock pmic key?
https://review.coreboot.org/c/coreboot/+/46878/comment/14f853cb_daf6af88 PS60, Line 105: S be consistent on upper case or lower case - we can do either
/* 1.2.0 set ...
or
/* 1.2.0 Set ....
But that should be consistent (e.g., you currently have "1.1 s" and "1.2.0 S")
https://review.coreboot.org/c/coreboot/+/46878/comment/ba139f6b_5d0b438b PS60, Line 140: /* : * XO_SOC_VOTE=11'h005 : */ remove this since the code is now very clear.
https://review.coreboot.org/c/coreboot/+/46878/comment/32d0636e_f6aff854 PS60, Line 152: /* : * XO_PMIC_TOP_DIG_SW=0 : */ remove this since the code is now very clear.