Attention is currently required from: Zheng Bao.
Hello Zheng Bao,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/69428
to review the following change.
Change subject: soc/amd/picasso: Move AMD firmware from 0x420000 to 0x20000 ......................................................................
soc/amd/picasso: Move AMD firmware from 0x420000 to 0x20000
The address 0x42000 is not an offically accepted address even though it works well so far.
Add a region in flash map where amdfw.rom can be put, instead of the CBFS which needs an extra 0x40 bytes space at the head.
Change-Id: I62e22dd5eeb5b85497efcf1e753415c0a6fdf2ca Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M src/mainboard/amd/mandolin/Kconfig M src/mainboard/amd/mandolin/variants/mandolin/board.fmd M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc 4 files changed, 34 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/69428/1
diff --git a/src/mainboard/amd/mandolin/Kconfig b/src/mainboard/amd/mandolin/Kconfig index 50b3e5d..bfb4cae 100644 --- a/src/mainboard/amd/mandolin/Kconfig +++ b/src/mainboard/amd/mandolin/Kconfig @@ -11,6 +11,7 @@ select AZALIA_PLUGIN_SUPPORT select HAVE_ACPI_RESUME select DRIVERS_UART_ACPI + select AMDFW_OUTSIDE_CBFS if BOARD_AMD_MANDOLIN select AMD_SOC_CONSOLE_UART if !AMD_LPC_DEBUG_CARD
config FMDFILE @@ -46,7 +47,7 @@ default 0x164e if SMSC_SIO1036_BASE_164E
config CBFS_SIZE - default 0x7cf000 if BOARD_AMD_MANDOLIN # Maximum size for the Mandolin FMAP + default 0x400000 if BOARD_AMD_MANDOLIN # Maximum size for the Mandolin FMAP default 0xfcf000 if BOARD_AMD_CEREME # Maximum size for the Cereme FMAP
config MAINBOARD_DIR @@ -69,7 +70,7 @@
config AMD_FWM_POSITION_INDEX int - default 3 if BOARD_AMD_MANDOLIN + default 4 if BOARD_AMD_MANDOLIN default 4 if BOARD_AMD_CEREME help TODO: might need to be adapted for better placement of files in cbfs diff --git a/src/mainboard/amd/mandolin/variants/mandolin/board.fmd b/src/mainboard/amd/mandolin/variants/mandolin/board.fmd index 33b281d..c3dc77f 100644 --- a/src/mainboard/amd/mandolin/variants/mandolin/board.fmd +++ b/src/mainboard/amd/mandolin/variants/mandolin/board.fmd @@ -1,8 +1,9 @@ FLASH@0xFF800000 8M { BIOS { EC 128K + AMDFW 2M RW_MRC_CACHE 64K FMAP 4K - COREBOOT(CBFS) + COREBOOT(CBFS) @4M } } diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index f3b982d..b24102c 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -394,6 +394,13 @@ comment "AMD Firmware Directory Table set to location for 16MB ROM" depends on AMD_FWM_POSITION_INDEX = 5
+config AMDFW_OUTSIDE_CBFS + def_bool n + help + The AMDFW (PSP) is typically locatable in cbfs. Select this + option to manually attach the generated amdfw.rom at an + offset of 0x20000 from the bottom of the coreboot ROM image. + config AMDFW_CONFIG_FILE string default "src/soc/amd/picasso/fw.cfg" diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index cff47af..258323e 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -286,10 +286,16 @@ --anywhere \ --output $@
+ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) +$(call add_intermediate, add_amdfw, $(obj)/amdfw.rom) + printf " DD Adding AMD Firmware\n" + $(CBFSTOOL) $(obj)/coreboot.pre write -r AMDFW -f $(obj)/amdfw.rom --fill-upward +else cbfs-files-y += apu/amdfw apu/amdfw-file := $(obj)/amdfw.rom apu/amdfw-position := $(PICASSO_FWM_POSITION) apu/amdfw-type := raw +endif
ifeq ($(CONFIG_VBOOT_SLOTS_RW_A)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) cbfs-files-y += apu/amdfw_a