[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: set use of legacy 8254 timer

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33512

Change subject: soc/intel/cannonlake: set use of legacy 8254 timer
......................................................................

soc/intel/cannonlake: set use of legacy 8254 timer

The Enable8254ClockGating/Enable8254ClockGatingOnS3 UPDs default to
enabled, but need to be disabled on Coffeelake/Whiskeylake when
SeaBIOS is used as the payload.  Add a Kconfig option to set it
as such.

Test: build/boot out-of-tree WHL board with both SeaBIOS and Tianocore,
ensure 8254 timer usage set correctly for each.

Signed-off-by: Matt DeVillier 
Change-Id: I0e888bf754cb72093f14fc02f39bddcd6d288203
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/fsp_params.c
2 files changed, 13 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/33512/1

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index dac3522..19b9679 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -315,4 +315,13 @@
      Setting non-zero value will allow to use DBC or DCI to debug SOC.
      PlatformDebugConsent in FspmUpd.h has the details.

+config USE_LEGACY_8254_TIMER
+	bool
+	default n if (SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE) && PAYLOAD_SEABIOS
+	default y
+	help
+	  This sets the Enable8254ClockGating and Enable8254ClockGatingOnS3 UPDs.
+	  On Coffeelake/Whiskeylake, these UPDs need to be disabled in order to
+	  boot SeabIOS, but should otherwise be enabled.
+
 endif
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index dd93882..a518541 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -244,6 +244,10 @@
    /* disable Legacy PME */
    memset(params->PcieRpPmSci, 0, sizeof(params->PcieRpPmSci));

+	/* Legacy 8254 timer support */
+	params->Enable8254ClockGating = CONFIG_USE_LEGACY_8254_TIMER;
+	params->Enable8254ClockGatingOnS3 = CONFIG_USE_LEGACY_8254_TIMER;
+
    /* USB */
    for (i = 0; i < ARRAY_SIZE(config->usb2_ports); i++) {
    	params->PortUsb20Enable[i] = config->usb2_ports[i].enable;