Morgan Jang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41690 )
Change subject: mb/ocp/deltalake: Config PCH PCIe ports in devicetree ......................................................................
Patch Set 15:
(7 comments)
https://review.coreboot.org/c/coreboot/+/41690/14//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41690/14//COMMIT_MSG@7 PS14, Line 7: mb/ocp/deltalake: Config PCH PCIe ports
Maybe "mb/ocp/deltalake: Config PCH PCIe ports in devicetree" ?
Done
https://review.coreboot.org/c/coreboot/+/41690/14/src/mainboard/ocp/deltalak... File src/mainboard/ocp/deltalake/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/41690/14/src/mainboard/ocp/deltalak... PS14, Line 43: 0
8
Done
https://review.coreboot.org/c/coreboot/+/41690/14/src/mainboard/ocp/deltalak... PS14, Line 44: .PortIndex = 0x8
remove
Done
https://review.coreboot.org/c/coreboot/+/41690/14/src/mainboard/ocp/deltalak... File src/mainboard/ocp/deltalake/romstage.c:
https://review.coreboot.org/c/coreboot/+/41690/14/src/mainboard/ocp/deltalak... PS14, Line 85: mupd->FspmConfig.PchPcieForceEnable[index] = 0;
remove […]
Done
https://review.coreboot.org/c/coreboot/+/41690/14/src/mainboard/ocp/deltalak... PS14, Line 88: mupd->FspmConfig.PchPcieForceEnable[config->pch_pci_port[index].PortIndex] = : config->pch_pci_port[index].ForceEnable;
I think there is no need for port remapping. I suggest using here […]
Done
https://review.coreboot.org/c/coreboot/+/41690/14/src/mainboard/ocp/deltalak... PS14, Line 90: mupd->FspmConfig.PchPciePortLinkSpeed[config->pch_pci_port[index].PortIndex] = : config->pch_pci_port[index].PortLinkSpeed;
same
Done
https://review.coreboot.org/c/coreboot/+/41690/14/src/vendorcode/intel/fsp/f... File src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspmUpd.h:
https://review.coreboot.org/c/coreboot/+/41690/14/src/vendorcode/intel/fsp/f... PS14, Line 153: UINT8 PortIndex
remove
Done