[coreboot-gerrit] Change in coreboot[master]: drivers/intel/fsp2_0: FSP-T requires NO_CBFS_MCACHE

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48282 )

Change subject: drivers/intel/fsp2_0: FSP-T requires NO_CBFS_MCACHE
......................................................................

Patch Set 1:
> Patch Set 1: Code-Review+2
>
> Hmm... okay let's land this for now, will have to think more about how to address this correctly. Is there a good reason the CAR teardown must happen before CBMEM reinit? Could we just flip the order of those?

Hmm I would suspect that this works but just for performance reasons alone it's a bad idea because cbmem is UC so CAR should be torn down ASAP. Other than that I think it's bad to assume cacheability of cbmem in postcar in general. I have some patches that set it up as WB, which would break if cbmem is set up before teardown.

FSP-T just has to go, at least on FSP2.0 where it should be optional by design (WIP).