[coreboot-gerrit] [S] Change in coreboot[master]: mainboard/msi/ms7d25: Configure NCT6687D pin for PECI

[Michał Żygowski (Code Review)]

Attention is currently required from: Michał Kopeć.

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68711 )

Change subject: mainboard/msi/ms7d25: Configure NCT6687D pin for PECI
......................................................................

mainboard/msi/ms7d25: Configure NCT6687D pin for PECI

One register configuring multi-pin functions was outside of the Global
Configuration Regisers space and skipped in the initial port patches.

Replicate the vendor configuration and set the Super I/O pin for PECI
functionality.

Signed-off-by: Michał Żygowski 
Change-Id: I90f142a1a9ee27dd061fc71b791bd4c7df97da6b
---
M src/mainboard/msi/ms7d25/bootblock.c
1 file changed, 25 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/68711/1

diff --git a/src/mainboard/msi/ms7d25/bootblock.c b/src/mainboard/msi/ms7d25/bootblock.c
index 2dcb763..110d682 100644
--- a/src/mainboard/msi/ms7d25/bootblock.c
+++ b/src/mainboard/msi/ms7d25/bootblock.c
@@ -6,6 +6,7 @@
 #include <superio/nuvoton/nct6687d/nct6687d.h>

#define SERIAL_DEV PNP_DEV(0x4e, NCT6687D_SP1)
+#define POWER_DEV PNP_DEV(0x4e, NCT6687D_SLEEP_PWR)

void bootblock_mainboard_early_init(void)
 {
@@ -13,6 +14,8 @@
    nuvoton_pnp_enter_conf_state(SERIAL_DEV);
    pnp_write_config(SERIAL_DEV, 0x13, 0xff); // IRQ8-15 level triggered, low
    pnp_write_config(SERIAL_DEV, 0x14, 0xff); // IRQ0-7 level triggered, low
+
+	/* Below are multi-pin function */
    pnp_write_config(SERIAL_DEV, 0x15, 0xaa);
    pnp_write_config(SERIAL_DEV, 0x1a, 0x02);
    pnp_write_config(SERIAL_DEV, 0x1b, 0x02);
@@ -31,7 +34,12 @@
    pnp_write_config(SERIAL_DEV, 0x2b, 0x20);
    pnp_write_config(SERIAL_DEV, 0x2c, 0x8a);
    pnp_write_config(SERIAL_DEV, 0x2d, 0xaa);
-	nuvoton_pnp_exit_conf_state(SERIAL_DEV);
+
+	pnp_set_logical_device(POWER_DEV);
+	/* Configure pin for PECI */
+	pnp_write_config(POWER_DEV, 0xf3, 0x80);
+
+	nuvoton_pnp_exit_conf_state(POWER_DEV);

if (CONFIG(CONSOLE_SERIAL))
    	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);