[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/smm: Ignore PM1 and GPE0 events in SCI mode

[Angel Pons (Code Review)]

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Patrick Rudolph.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50750 )

Change subject: soc/intel/common/block/smm: Ignore PM1 and GPE0 events in SCI mode
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Patch Set 2:

(1 comment)

Patchset:

PS2:
> Looks like we have some macro naming alignment to work on across the SoC definitions to avoid the cu […]

Xeon-SP is an easy fix. APL/GLK doesn't seem to have the bit, but I'll add the macro anyway for consistency.