[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/cpu: Refactor init_cpus function

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44076 )

Change subject: soc/intel/common/block/cpu: Refactor init_cpus function
......................................................................

soc/intel/common/block/cpu: Refactor init_cpus function

This patch makes init_cpus function external so that it can be used in below
scenarios:

1. During coreboot is doing MP initialization as part of BS_DEV_INIT_CHIPS (exclude
 this call if user has selected CONFIG_USE_INTEL_FSP_MP_INIT)
2. coreboot would like to take APs control back after FSP-S has done with MP
 initialization based on user select CONFIG_USE_INTEL_FSP_MP_INIT

Also make sure post_cpus_init function is getting executed unconditionally to
update MTTR snapshot on all cores.

Change-Id: Idc03090360f34df074b33ba0fced2d192edf068a
Signed-off-by: Subrata Banik 
---
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/include/intelblocks/mp_init.h
2 files changed, 29 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/44076/1

diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 90bae16..4f27e52 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -125,14 +125,19 @@
    *parallel = 1;
 }

-static void init_cpus(void *unused)
+/*
+ * Perform BSP and AP initialization
+ * This function can be called in below cases
+ * 1. During coreboot is doing MP initialization as part of BS_DEV_INIT_CHIPS (exclude
+ * this call if user has selected CONFIG_USE_INTEL_FSP_MP_INIT)
+ * 2. coreboot would like to take APs control back after FSP-S has done with MP
+ * initialization based on user select CONFIG_USE_INTEL_FSP_MP_INIT
+ */
+void init_cpus(void)
 {
    struct device *dev = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER);
    assert(dev != NULL);

-	if (CONFIG(USE_INTEL_FSP_MP_INIT))
-		return;
-
    microcode_patch = intel_microcode_find();
    intel_microcode_load_unlocked(microcode_patch);

@@ -140,6 +145,15 @@
    	soc_init_cpus(dev->link_list);
 }

+static void coreboot_init_cpus(void *unused)
+{
+        if (CONFIG(USE_INTEL_FSP_MP_INIT))
+                return;
+
+	init_cpus();
+}
+
+
 static void wrapper_x86_setup_mtrrs(void *unused)
 {
    x86_setup_mtrrs_with_detect();
@@ -148,9 +162,6 @@
 /* Ensure to re-program all MTRRs based on DRAM resource settings */
 static void post_cpus_init(void *unused)
 {
-	if (CONFIG(USE_INTEL_FSP_MP_INIT))
-		return;
-
    if (mp_run_on_all_cpus(&wrapper_x86_setup_mtrrs, NULL) < 0)
    	printk(BIOS_ERR, "MTRR programming failure\n");

@@ -158,6 +169,6 @@
 }

/* Do CPU MP Init before FSP Silicon Init */
-BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_ENTRY, init_cpus, NULL);
+BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_ENTRY, coreboot_init_cpus, NULL);
 BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_EXIT, post_cpus_init, NULL);
 BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, post_cpus_init, NULL);
diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h
index e03d8bd..615449f 100644
--- a/src/soc/intel/common/block/include/intelblocks/mp_init.h
+++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h
@@ -69,6 +69,16 @@
 void get_microcode_info(const void **microcode, int *parallel);

/*
+ * Perform BSP and AP initialization
+ * This function can be called in below cases
+ * 1. During coreboot is doing MP initialization as part of BS_DEV_INIT_CHIPS (exclude
+ * this call if user has selected CONFIG_USE_INTEL_FSP_MP_INIT)
+ * 2. coreboot would like to take APs control back after FSP-S has done with MP
+ * initialization based on user select CONFIG_USE_INTEL_FSP_MP_INIT
+ */
+void init_cpus(void);
+
+/*
  * SoC Overrides
  *
  * All new SoC must implement below functionality for ramstage.