26 Nov
2020
26 Nov
'20
6:38 a.m.
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47436 )
Change subject: soc/intel/alderlake: Add lp5_ccc_config to the board memory configuration ......................................................................
Patch Set 4: Code-Review+2
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I24b1cf50c1b0b945fce75239bac38e40aeb8a83a
Gerrit-Change-Number: 47436
Gerrit-PatchSet: 4
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Gerrit-Comment-Date: Thu, 26 Nov 2020 05:38:20 +0000
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