Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83937?usp=email )
(
10 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/mediatek: Refactor MMU operation for L2C SRAM and DMA ......................................................................
soc/mediatek: Refactor MMU operation for L2C SRAM and DMA
Refactor mmu operation by - moving mtk_soc_disable_l2c_sram to l2c_ops.c - keeping mtk_soc_after_dram in mmu_cmops.c
Change-Id: I14bd8a82e0b5f8f00ce2b52e5aee918e130912d4 Signed-off-by: Jarried Lin jarried.lin@mediatek.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/83937 Reviewed-by: Yu-Ping Wu yupingso@google.com Reviewed-by: Yidi Lin yidilin@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- A src/soc/mediatek/common/l2c_ops.c M src/soc/mediatek/common/mmu_cmops.c M src/soc/mediatek/mt8186/Makefile.mk M src/soc/mediatek/mt8188/Makefile.mk M src/soc/mediatek/mt8192/Makefile.mk M src/soc/mediatek/mt8195/Makefile.mk 6 files changed, 39 insertions(+), 28 deletions(-)
Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, approved
diff --git a/src/soc/mediatek/common/l2c_ops.c b/src/soc/mediatek/common/l2c_ops.c new file mode 100644 index 0000000..f748ab0 --- /dev/null +++ b/src/soc/mediatek/common/l2c_ops.c @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/mmio.h> +#include <soc/mcucfg.h> +#include <soc/mmu_operations.h> + +DEFINE_BIT(MP0_CLUSTER_CFG0_L3_SHARE_EN, 9) +DEFINE_BIT(MP0_CLUSTER_CFG0_L3_SHARE_PRE_EN, 8) + +void mtk_soc_disable_l2c_sram(void) +{ + unsigned long v; + + SET32_BITFIELDS(&mtk_mcucfg->mp0_cluster_cfg0, + MP0_CLUSTER_CFG0_L3_SHARE_EN, 0); + dsb(); + + __asm__ volatile ("mrs %0, S3_0_C15_C3_5" : "=r" (v)); + v |= (0xf << 4); + __asm__ volatile ("msr S3_0_C15_C3_5, %0" : : "r" (v)); + dsb(); + + do { + __asm__ volatile ("mrs %0, S3_0_C15_C3_7" : "=r" (v)); + } while (((v >> 0x4) & 0xf) != 0xf); + + SET32_BITFIELDS(&mtk_mcucfg->mp0_cluster_cfg0, + MP0_CLUSTER_CFG0_L3_SHARE_PRE_EN, 0); + dsb(); +} diff --git a/src/soc/mediatek/common/mmu_cmops.c b/src/soc/mediatek/common/mmu_cmops.c index 4b81a27..e102569 100644 --- a/src/soc/mediatek/common/mmu_cmops.c +++ b/src/soc/mediatek/common/mmu_cmops.c @@ -1,34 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <device/mmio.h> -#include <soc/mcucfg.h> -#include <soc/mmu_operations.h> #include <soc/symbols.h> - -DEFINE_BIT(MP0_CLUSTER_CFG0_L3_SHARE_EN, 9) -DEFINE_BIT(MP0_CLUSTER_CFG0_L3_SHARE_PRE_EN, 8) - -void mtk_soc_disable_l2c_sram(void) -{ - unsigned long v; - - SET32_BITFIELDS(&mtk_mcucfg->mp0_cluster_cfg0, - MP0_CLUSTER_CFG0_L3_SHARE_EN, 0); - dsb(); - - __asm__ volatile ("mrs %0, S3_0_C15_C3_5" : "=r" (v)); - v |= (0xf << 4); - __asm__ volatile ("msr S3_0_C15_C3_5, %0" : : "r" (v)); - dsb(); - - do { - __asm__ volatile ("mrs %0, S3_0_C15_C3_7" : "=r" (v)); - } while (((v >> 0x4) & 0xf) != 0xf); - - SET32_BITFIELDS(&mtk_mcucfg->mp0_cluster_cfg0, - MP0_CLUSTER_CFG0_L3_SHARE_PRE_EN, 0); - dsb(); -} +#include <soc/mmu_operations.h>
/* mtk_soc_after_dram is called in romstage */ void mtk_soc_after_dram(void) diff --git a/src/soc/mediatek/mt8186/Makefile.mk b/src/soc/mediatek/mt8186/Makefile.mk index f790d2a..d44dc45 100644 --- a/src/soc/mediatek/mt8186/Makefile.mk +++ b/src/soc/mediatek/mt8186/Makefile.mk @@ -23,6 +23,7 @@ romstage-y += ../common/dram_init.c romstage-y += ../common/dramc_param.c romstage-y += ../common/emi.c +romstage-y += ../common/l2c_ops.c romstage-y += ../common/memory.c romstage-y += ../common/memory_test.c romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c @@ -41,6 +42,7 @@ ramstage-y += ../common/display.c ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c ramstage-y += ../common/emi.c +ramstage-y += ../common/l2c_ops.c ramstage-y += ../common/mcu.c ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c diff --git a/src/soc/mediatek/mt8188/Makefile.mk b/src/soc/mediatek/mt8188/Makefile.mk index 727b3f8..9015a63e 100644 --- a/src/soc/mediatek/mt8188/Makefile.mk +++ b/src/soc/mediatek/mt8188/Makefile.mk @@ -21,6 +21,7 @@ romstage-y += ../common/dram_init.c romstage-y += ../common/dramc_param.c romstage-y += ../common/emi.c +romstage-y += ../common/l2c_ops.c romstage-y += ../common/memory.c romstage-y += ../common/memory_test.c romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c @@ -43,6 +44,7 @@ ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c ramstage-y += ../common/emi.c +ramstage-y += ../common/l2c_ops.c ramstage-y += ../common/mcu.c ramstage-y += ../common/mcupm.c ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c diff --git a/src/soc/mediatek/mt8192/Makefile.mk b/src/soc/mediatek/mt8192/Makefile.mk index 081a9a9..de2d7bf 100644 --- a/src/soc/mediatek/mt8192/Makefile.mk +++ b/src/soc/mediatek/mt8192/Makefile.mk @@ -21,6 +21,7 @@ romstage-y += ../common/clkbuf.c srclken_rc.c romstage-y += ../common/dram_init.c romstage-y += ../common/dramc_param.c +romstage-y += ../common/l2c_ops.c romstage-y += ../common/memory.c ../common/memory_test.c romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c romstage-y += ../common/pll.c pll.c @@ -39,6 +40,7 @@ ramstage-y += ../common/dfd.c ramstage-y += ../common/dpm.c ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c +ramstage-y += ../common/l2c_ops.c ramstage-y += ../common/mcu.c ramstage-y += ../common/mcupm.c ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c diff --git a/src/soc/mediatek/mt8195/Makefile.mk b/src/soc/mediatek/mt8195/Makefile.mk index f91372a..3446144 100644 --- a/src/soc/mediatek/mt8195/Makefile.mk +++ b/src/soc/mediatek/mt8195/Makefile.mk @@ -23,6 +23,7 @@ romstage-y += ../common/dram_init.c romstage-y += ../common/dramc_param.c romstage-y += emi.c +romstage-y += ../common/l2c_ops.c romstage-y += ../common/memory.c romstage-y += ../common/memory_test.c romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c @@ -51,6 +52,7 @@ ramstage-y += ../common/dp/dp_intf.c ../common/dp/dptx.c ../common/dp/dptx_hal.c dp_intf.c ramstage-y += emi.c ramstage-y += hdmi.c +ramstage-y += ../common/l2c_ops.c ramstage-y += ../common/mcu.c ramstage-y += ../common/mcupm.c ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c