[coreboot-gerrit] Change in coreboot[master]: nb/i945: Add some comments for sdram_thermal_management (not for merge)

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40333 )

Change subject: nb/i945: Add some comments for sdram_thermal_management (not for merge)
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nb/i945: Add some comments for sdram_thermal_management (not for merge)

Change-Id: I53bac1f80fb7437ed3a123b315bb24a131e4e29a
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/i945/raminit.c
1 file changed, 27 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/40333/1

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 8a3cfff..f7400dc 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -2342,7 +2342,33 @@

static void sdram_thermal_management(void)
 {
-
+/*
+	if !(MCHBAR32(DFT_STRAP1) & (1 << 20)) {
+		MCHBAR8(TCOF0 + 2) = 1;
+		MCHBAR8(TSC1) = (1 << 7) | (3 << 3);
+		MCHBAR8(TSC1 + 1) = (1 << 1);
+		MCHBAR32(TSTTP1) = 0x2b11;
+		MCHBAR32(TSTTP1 + 2) = 0;
+		MCHBAR8(THERM1_1) = ~((3 << 5) | (3 << 0));
+		MCHBAR8(TSC0_1) = ~((3 << 5) | (7 << 0));
+		MCHBAR8(TSC0_1 + 1) = (1 << 1);
+		MCHBAR32(TSTTP0_1) = 0x2b11;
+		MCHBAR32(TSTTP0_1 + 2) = 0;
+		MCHBAR8(THERM0_1) = (1 << 7) | (7 << 2);
+		if (dual channel) { //?
+			if (channel 0 populated)
+				MCHBAR32(C0DMC) |= (1 << 15);
+			if (channel 1 populated)
+				MCHBAR32(C1DMC) |= (1 << 15)
+		....
+		}
+	}
+	MCHBAR8(TCOF0 + 2) |= (1 << 7);
+	MCHBAR8(THERM1_1) |= 1;
+	MCHBAR8(TCO1) |= (1 << 7);
+	MCHBAR8(THERM0_1) |= 1;
+	MCHBAR8(TCO0) |= (1 << 7);
+*/
    MCHBAR8(TCO1) = 0x00;
    MCHBAR8(TCO0) = 0x00;