Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62918 )
Change subject: mb/google/brya/var/taeko: Enable Genesys L1 max entry delay ......................................................................
mb/google/brya/var/taeko: Enable Genesys L1 max entry delay
The workaround causes the eMMC controller to not enter its L1 during the boot process
BUG=b:220079865 TEST=Build FW and run stress exceed 2500 cycles.
Signed-off-by: Kevin Chang kevin.chang@lcfc.corp-partner.google.com Change-Id: I142a816611e204e6c8577d15b3f0a0e08251f848 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62918 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Martin L Roth martinroth@google.com Reviewed-by: Subrata Banik subratabanik@google.com Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-by: Peichao Wang pwang12@lenovo.corp-partner.google.com --- M src/mainboard/google/brya/Kconfig.name 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved Peichao Wang: Looks good to me, approved Subrata Banik: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index dd7935c..f1cab9d 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -136,6 +136,7 @@ select DRIVERS_GENERIC_BAYHUB_LV2 select DRIVERS_GENESYSLOGIC_GL9750 select DRIVERS_GENESYSLOGIC_GL9763E + select DRIVERS_GENESYSLOGIC_GL9763E_L1_MAX if DRIVERS_GENESYSLOGIC_GL9763E select CHROMEOS_WIFI_SAR if CHROMEOS
config BOARD_GOOGLE_TAEKO4ES