Werner Zeh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35594 )
Change subject: mb/siemens/mc_bdx1: Enable VBOOT ......................................................................
mb/siemens/mc_bdx1: Enable VBOOT
Enable VBOOT in Kconfig and provide a flashmap that includes all the needed sections for VBOOT support.
Change-Id: Iee12a5d1781c869b20bc14a52ecbf23474caa3fd Signed-off-by: Werner Zeh werner.zeh@siemens.com --- M src/mainboard/siemens/mc_bdx1/Kconfig A src/mainboard/siemens/mc_bdx1/mc_bdx1.fmd 2 files changed, 41 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/35594/1
diff --git a/src/mainboard/siemens/mc_bdx1/Kconfig b/src/mainboard/siemens/mc_bdx1/Kconfig index 6feb1cf..35d29c1 100644 --- a/src/mainboard/siemens/mc_bdx1/Kconfig +++ b/src/mainboard/siemens/mc_bdx1/Kconfig @@ -15,6 +15,21 @@ select DRIVERS_I2C_PCA9538 select MAINBOARD_HAS_TPM2 select MAINBOARD_HAS_LPC_TPM + select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY + select BOOT_DEVICE_SUPPORTS_WRITES + +config VBOOT + select VBOOT_MEASURED_BOOT + select VBOOT_VBNV_FLASH + select VBOOT_NO_BOARD_SUPPORT + select GBB_FLAG_DISABLE_LID_SHUTDOWN + select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_FWMP + +config FMDFILE + string + default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/mc_bdx1.fmd"
config MAINBOARD_DIR string @@ -30,7 +45,7 @@
config CBFS_SIZE hex - default 0x00D00000 + default 0x00BF4000
config VIRTUAL_ROM_SIZE hex diff --git a/src/mainboard/siemens/mc_bdx1/mc_bdx1.fmd b/src/mainboard/siemens/mc_bdx1/mc_bdx1.fmd new file mode 100644 index 0000000..b8d5d9c --- /dev/null +++ b/src/mainboard/siemens/mc_bdx1/mc_bdx1.fmd @@ -0,0 +1,25 @@ +FLASH@0xff000000 0x1000000 { + SI_ALL@0x0 0x300000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x2ff000 + } + SI_BIOS@0x300000 0xd00000 { + RW_MRC_CACHE@0x000000 0x10000 + RW_SHARED@0x10000 0x4000 { + SHARED_DATA@0x0 0x2000 + VBLOCK_DEV@0x2000 0x2000 + } + RW_VPD@0x14000 0x2000 + RW_NVRAM@0x16000 0x2000 + WP_RO@0x18000 0xce8000 { + RO_VPD@0x0 0x4000 + RO_SECTION@0x4000 0xce4000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0xbf4000 + } + } + } +}