Attention is currently required from: Felix Singer, Lance Zhao, Jason Glenesk, Raul Rangel, Nico Huber, Furquan Shaikh, Marshall Dawson, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58118 )
Change subject: acpigen,soc/amd/cezanne,intel/{common,skl}: rework CPPC table passing ......................................................................
Patch Set 9:
(10 comments)
File src/soc/amd/cezanne/cppc.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130152): https://review.coreboot.org/c/coreboot/+/58118/comment/d9aec64f_4d74a837 PS9, Line 15: [CPPC_HIGHEST_PERF] = CPPC_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_HIGHEST_PERF, 8), line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130152): https://review.coreboot.org/c/coreboot/+/58118/comment/a7126cfc_504aa2c4 PS9, Line 16: [CPPC_NOMINAL_PERF] = CPPC_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_NOMINAL_PERF, 8), line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130152): https://review.coreboot.org/c/coreboot/+/58118/comment/756d2f74_89a27bc6 PS9, Line 17: [CPPC_LOWEST_NONL_PERF] = CPPC_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_LOW_NON_LIN_PERF, 8), line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130152): https://review.coreboot.org/c/coreboot/+/58118/comment/659d3e15_e858d7b1 PS9, Line 18: [CPPC_LOWEST_PERF] = CPPC_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_LOWEST_PERF, 8), line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130152): https://review.coreboot.org/c/coreboot/+/58118/comment/68d66491_831699de PS9, Line 20: [CPPC_DESIRED_PERF] = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_DES_PERF, 8), line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130152): https://review.coreboot.org/c/coreboot/+/58118/comment/4dcdd033_f5adb7db PS9, Line 21: [CPPC_MIN_PERF] = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_MIN_PERF, 8), line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130152): https://review.coreboot.org/c/coreboot/+/58118/comment/38964dba_516d4110 PS9, Line 22: [CPPC_MAX_PERF] = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_MAX_PERF, 8), line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130152): https://review.coreboot.org/c/coreboot/+/58118/comment/d474666a_a9b6e78e PS9, Line 26: [CPPC_REF_PERF_COUNTER] = CPPC_REG_MSR(MSR_MAX_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64), line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130152): https://review.coreboot.org/c/coreboot/+/58118/comment/3949a691_a7356162 PS9, Line 27: [CPPC_DELIVERED_PERF_COUNTER] = CPPC_REG_MSR(MSR_ACTUAL_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64), line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130152): https://review.coreboot.org/c/coreboot/+/58118/comment/e5244bd3_96654f2c PS9, Line 34: [CPPC_PERF_PREF] = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_ENERGY_PERF_PREF, 8), line over 96 characters