[coreboot-gerrit] Change in coreboot[master]: mb/intel/shadowmountain: Add the ASL code

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50993 )

Change subject: mb/intel/shadowmountain: Add the ASL code
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mb/intel/shadowmountain: Add the ASL code

This reverts commit d510b60f5b4eee6c165039be4acbe89ff25d8a4a.

This patch includes the DSDT ASL code for shadowmountain board.

BUG=b:175808146
TEST= Boot shadowmountain board, dump and verify the DSDT ASL entries.

Signed-off-by: V Sowmya 
Change-Id: I5aa60730fc9b93fa97b2bafbb8b2714b6b37becc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50993
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/mainboard/intel/shadowmountain/dsdt.asl
1 file changed, 28 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/mainboard/intel/shadowmountain/dsdt.asl b/src/mainboard/intel/shadowmountain/dsdt.asl
index c8dc9ee..57324b3 100644
--- a/src/mainboard/intel/shadowmountain/dsdt.asl
+++ b/src/mainboard/intel/shadowmountain/dsdt.asl
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

#include <acpi/acpi.h>
+#include <baseboard/ec.h>
+#include <baseboard/gpio.h>

DefinitionBlock(
    "dsdt.aml",
@@ -12,4 +14,30 @@
 )
 {
    #include <acpi/dsdt_top.asl>
+	#include <soc/intel/common/block/acpi/acpi/platform.asl>
+
+	/* global NVS and variables */
+	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+
+	#include <cpu/intel/common/acpi/cpu.asl>
+
+	Scope (_SB) {
+		Device (PCI0)
+		{
+			#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+			#include <soc/intel/alderlake/acpi/southbridge.asl>
+			#include <soc/intel/alderlake/acpi/tcss.asl>
+		}
+	}
+
+	/* Chrome OS Embedded Controller */
+	Scope (_SB.PCI0.LPCB)
+	{
+		// ACPI code for EC SuperIO functions
+		#include <ec/google/chromeec/acpi/superio.asl>
+		// ACPI code for EC functions
+		#include <ec/google/chromeec/acpi/ec.asl>
+	}
+
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }