Attention is currently required from: Raul Rangel, Martin L Roth, Jon Murphy, Tim Van Patten.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74112 )
Change subject: mb/google/myst: Enable PCIe devices in devicetree
......................................................................
Patch Set 39:
(2 comments)
File src/mainboard/google/myst/port_descriptors.c:
https://review.coreboot.org/c/coreboot/+/74112/comment/56081bd9_e3990be5
PS38, Line 51: .link_speed_capability = GEN3,
using GEN_MAX should also give you gen 4 speed btw
File src/mainboard/google/myst/variants/baseboard/include/baseboard/variants.h:
https://review.coreboot.org/c/coreboot/+/74112/comment/95ef4265_3c6d5618
PS39, Line 10: /* PCIE_GPP_x_y_DEVFN macros are off by one*/
with CB:74565 this is no longer true
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