Attention is currently required from: Felix Singer, Jérémy Compostella, Shuo Liu.
yuchi.chen@intel.com has posted comments on this change by yuchi.chen@intel.com. ( https://review.coreboot.org/c/coreboot/+/83318?usp=email )
Change subject: soc/intel/common/systemagent: Improve systemagent ......................................................................
Patch Set 8:
(1 comment)
File src/soc/intel/common/block/systemagent/systemagent_def.h:
https://review.coreboot.org/c/coreboot/+/83318/comment/f2b7ad5d_4a57b030?usp... : PS3, Line 73: * IS_LIMIT = If registers/offset indicates address limit or address limit plus 1.
Not sure if below pattern fits for all limit cases or not. […]
That doesn't make sense since all values here should be aligned.
In SNR, the limit address register is read as 0x7C00_0000. According to EDS, "any 32-bit transaction that satisfies '0 <= Address[31:26] <= TOLM[31:26]' is a transaction towards main memory", thus we should treat the lower bits as 1s, that means the TOLUD is 0x8000_0000.
From existing code, we can infer the register value is 0x8000_0000.