Attention is currently required from: Raul Rangel, Martin L Roth, Jon Murphy, Tim Van Patten, Karthik Ramasubramanian, Mark Hasemeyer.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74112 )
Change subject: mb/google/myst: Enable PCIe devices in devicetree
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Patch Set 40: -Code-Review
(1 comment)
File src/mainboard/google/myst/port_descriptors.c:
https://review.coreboot.org/c/coreboot/+/74112/comment/1112ed72_14e05dea
PS40, Line 51: GEN3
`lspci -v` should show you the speed.
i'm still working on the dxio descriptor data structure update; want to do all upd-related changes in one patch train to only have one point in time where we have an incompatible upd data structure change where we need to make sure to use the correct coreboot + fsp combination. the scope of the upd cleanup/improvement is rather large and not the only thing i work on right now, but i try to have that done before the bringup.
the link speed parameter is mainly meant to limit the link speed
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