Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6459
-gerrit
commit 297728764a99a5ba844f277a8d34e7112c4748c2 Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Sat Aug 2 10:15:44 2014 +1000
util/inteltool: Typo in dump output for 'GP_IO_SEL3'
The GPIO offset of '0x44 - GP_IO_SEL3' as specified in the pch.h header is incorrectly reported as 'GPIO_SEL3'.
Change-Id: I56dcdda109d5f57ed45938d60b995807bdfb46b1 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- util/inteltool/gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c index 42e7272..49c1325 100644 --- a/util/inteltool/gpio.c +++ b/util/inteltool/gpio.c @@ -188,7 +188,7 @@ static const io_register_t ich10_gpio_registers[] = { { 0x38, 4, "GP_LVL2" }, { 0x3C, 4, "RESERVED" }, { 0x40, 4, "GPIO_USE_SEL3" }, - { 0x44, 4, "GPIO_SEL3" }, + { 0x44, 4, "GP_IO_SEL3" }, { 0x48, 4, "GPIO_LVL3" }, { 0x4c, 4, "RESERVED" }, { 0x50, 4, "RESERVED" }, @@ -242,7 +242,7 @@ static const io_register_t pch_gpio_registers[] = { { 0x38, 4, "GP_LVL2" }, { 0x3c, 4, "RESERVED" }, { 0x40, 4, "GPIO_USE_SEL3" }, - { 0x44, 4, "GPIO_SEL3" }, + { 0x44, 4, "GP_IO_SEL3" }, { 0x48, 4, "GPIO_LVL3" }, { 0x4c, 4, "RESERVED" }, { 0x50, 4, "RESERVED" },