Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35187 )
Change subject: [NOTFORMERGE] soc/intel exit_car.S ......................................................................
[NOTFORMERGE] soc/intel exit_car.S
Change-Id: Icd369029d9bbf0aa72923513952e1aacf88c0f40 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/exit_car.S M src/cpu/intel/car/non-evict/exit_car.S M src/cpu/intel/car/p4-netburst/exit_car.S M src/drivers/amd/agesa/cache_as_ram.S M src/soc/amd/common/block/cpu/car/exit_car.S M src/soc/intel/common/block/cpu/car/exit_car.S 6 files changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/35187/1
diff --git a/src/arch/x86/exit_car.S b/src/arch/x86/exit_car.S index 769a758..8ae7a66 100644 --- a/src/arch/x86/exit_car.S +++ b/src/arch/x86/exit_car.S @@ -34,6 +34,7 @@ call gdt_init
/* chipset_teardown_car() is expected to disable cache-as-ram. */ + /* ..... */ call chipset_teardown_car
/* Enable caching if not already enabled. */ @@ -42,6 +43,7 @@ mov %eax, %cr0
/* Ensure cache is clean. */ + /* ..... */ invd
/* Set up new stack. */ diff --git a/src/cpu/intel/car/non-evict/exit_car.S b/src/cpu/intel/car/non-evict/exit_car.S index 8adc5f6..ee71d81 100644 --- a/src/cpu/intel/car/non-evict/exit_car.S +++ b/src/cpu/intel/car/non-evict/exit_car.S @@ -29,6 +29,7 @@ post_code(0x30)
/* Disable cache. */ + /* ..... */ movl %cr0, %eax orl $CR0_CacheDisable, %eax movl %eax, %cr0 diff --git a/src/cpu/intel/car/p4-netburst/exit_car.S b/src/cpu/intel/car/p4-netburst/exit_car.S index 3b99128..ba57546 100644 --- a/src/cpu/intel/car/p4-netburst/exit_car.S +++ b/src/cpu/intel/car/p4-netburst/exit_car.S @@ -27,6 +27,7 @@ post_code(0x30)
/* Disable cache. */ + /* ..... */ movl %cr0, %eax orl $CR0_CacheDisable, %eax movl %eax, %cr0 diff --git a/src/drivers/amd/agesa/cache_as_ram.S b/src/drivers/amd/agesa/cache_as_ram.S index 4f0bb3f..37dfd3f 100644 --- a/src/drivers/amd/agesa/cache_as_ram.S +++ b/src/drivers/amd/agesa/cache_as_ram.S @@ -131,6 +131,7 @@ #endif
/* Disable cache */ + /* ..... */ movl %cr0, %eax orl $CR0_CacheDisable, %eax movl %eax, %cr0 diff --git a/src/soc/amd/common/block/cpu/car/exit_car.S b/src/soc/amd/common/block/cpu/car/exit_car.S index f9d056e..9a36df0 100644 --- a/src/soc/amd/common/block/cpu/car/exit_car.S +++ b/src/soc/amd/common/block/cpu/car/exit_car.S @@ -23,6 +23,7 @@ pop %esp
/* Disable cache */ + /* ..... */ movl %cr0, %eax orl $CR0_CacheDisable, %eax movl %eax, %cr0 diff --git a/src/soc/intel/common/block/cpu/car/exit_car.S b/src/soc/intel/common/block/cpu/car/exit_car.S index ab7886c..8aa8bfb 100644 --- a/src/soc/intel/common/block/cpu/car/exit_car.S +++ b/src/soc/intel/common/block/cpu/car/exit_car.S @@ -44,6 +44,10 @@ */ pop %ebx
+ + /* Disable cache ??? */ + + /* Disable MTRRs. */ mov $(MTRR_DEF_TYPE_MSR), %ecx rdmsr @@ -55,6 +59,7 @@ car_nem_teardown:
/* invalidate cache contents. */ + /* maybe redundant ? */ invd
/* Knock down bit 1 then bit 0 of NEM control not combining steps. */ @@ -69,6 +74,8 @@ .global car_cqos_teardown car_cqos_teardown:
+ /* inconsistent, no invd here */ + /* Go back to all-evicting mode, set both masks to all-1s */ mov $MSR_L2_QOS_MASK(0), %ecx rdmsr @@ -91,6 +98,7 @@ car_nem_enhanced_teardown:
/* invalidate cache contents. */ + /* maybe redundant ? */ invd
/* Knock down bit 1 then bit 0 of NEM control not combining steps. */