Anil Kumar K has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60177 )
Change subject: [Test] [Do Not Merge] alderlake: Disable TCSS ......................................................................
[Test] [Do Not Merge] alderlake: Disable TCSS
Change-Id: I0f5bca4b022be83c040ea2cab9d841e148b0633b --- M src/soc/intel/alderlake/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/60177/1
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 9e69663..d34500b 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -84,7 +84,6 @@ select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP select SOC_INTEL_COMMON_BLOCK_SMM_LOCK_GPIO_PADS - select SOC_INTEL_COMMON_BLOCK_TCSS select SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC select SOC_INTEL_COMMON_BLOCK_USB4 select SOC_INTEL_COMMON_BLOCK_USB4_PCIE