[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8192: Switch to highest DDR frequency to reduce bootup...

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44730 )

Change subject: soc/mediatek/mt8192: Switch to highest DDR frequency to reduce bootup time
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/44730/2/src/soc/mediatek/mt8192/dra... 
File src/soc/mediatek/mt8192/dramc_dvfs.c:

https://review.coreboot.org/c/coreboot/+/44730/2/src/soc/mediatek/mt8192/dra... 
PS2, Line 280: 	for (u8 chn = 0; chn < CHANNEL_MAX; chn++)
suspect code indent for conditional statements (8, 8)