Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83962?usp=email )
Change subject: soc/intel/pantherlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT ......................................................................
soc/intel/pantherlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
This patch replaces the SoC-specific config option `SOC_INTEL_PANTHERLAKE_DEBUG_CONSENT` with the generic `SOC_INTEL_COMMON_DEBUG_CONSENT`.
TEST=Able to build and boot google/fatcat without any functional impact while debugging.
Change-Id: I36bbe14d02654ed9dbda21df0d9a6a6769b87754 Signed-off-by: Subrata Banik subratabanik@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/83962 Reviewed-by: Felix Held felix-coreboot@felixheld.de Reviewed-by: Dinesh Gehlot digehlot@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/pantherlake/Kconfig 1 file changed, 9 insertions(+), 18 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Dinesh Gehlot: Looks good to me, approved
diff --git a/src/soc/intel/pantherlake/Kconfig b/src/soc/intel/pantherlake/Kconfig index 5e5516a..83d6292 100644 --- a/src/soc/intel/pantherlake/Kconfig +++ b/src/soc/intel/pantherlake/Kconfig @@ -218,25 +218,16 @@ string "Location of FSP headers" default "src/vendorcode/intel/fsp/fsp2_0/pantherlake/"
-config SOC_INTEL_PANTHERLAKE_DEBUG_CONSENT - int "Debug Consent" - # USB DBC is more common for developers so make this default to 4 if - # SOC_INTEL_DEBUG_CONSENT=y +# Override platform debug consent value: +# 0: Disabled, +# 2: Enabled Trace active: TraceHub is enabled and trace is active, blocks s0ix, +# 4: Enabled Trace ready: TraceHub is enabled and allowed S0ix, +# 6: Enabled Trace power off: TraceHub is powergated, provide setting close to functional +# low power state, +# 7: User needs to configure Advanced Debug Settings manually. +config SOC_INTEL_COMMON_DEBUG_CONSENT + int default 4 if SOC_INTEL_DEBUG_CONSENT - default 0 - help - This is to control debug interface on SOC. - Setting non-zero value will allow to use DBC or DCI to debug SOC. - PlatformDebugConsent in FspmUpd.h has the details. - - Desired platform debug type are - 0:Disabled, - 2:Enabled Trace active: TraceHub is enabled and trace is active, - blocks s0ix, - 4:Enabled Trace ready: TraceHub is enabled and allowed S0ix, - 6:Enabled Trace power off: TraceHub is powergated, provide setting close to - functional low power state, - 7:user needs to configure Advanced Debug Settings manually.
config DATA_BUS_WIDTH int